LCOV - code coverage report
Current view: top level - arch/x86/events/intel - core.c (source / functions) Hit Total Coverage
Test: landlock.info Lines: 227 1528 14.9 %
Date: 2021-04-22 12:43:58 Functions: 20 119 16.8 %

Function Name Sort by function name Hit count Sort by hit count
__icl_update_topdown_event 0
__intel_get_event_constraints 0
__intel_pmu_disable_all 0
__intel_pmu_enable_all 0
__intel_shared_reg_get_constraints 0
__intel_shared_reg_put_constraints 0
allocate_excl_cntrs 4
allocate_shared_regs 4
any_show 0
bdw_limit_period 0
branches_show 0
check_msr 4
cmask_show 0
core_guest_get_msrs 0
core_pmu_enable_all 0
core_pmu_enable_event 0
core_pmu_hw_config 0
default_is_visible 2
dyn_constraint 0
edge_show 0
event_show 0
exra_is_visible 2
fixup_ht_bug 1
flip_smm_bit 4
free_excl_cntrs 4
freeze_on_smi_show 0
freeze_on_smi_store 0
frontend_show 0
glp_get_event_constraints 0
handle_pmi_common 0
hsw_get_event_constraints 0
hsw_hw_config 0
icl_get_event_constraints 0
icl_set_topdown_event_period 0
icl_update_topdown_event 0
in_tx_cp_show 0
in_tx_show 0
intel_alt_er 0
intel_arch_events_quirk 1
intel_bts_constraints 0
intel_check_pebs_isolation 1
intel_clear_masks 0
intel_clovertown_quirk 0
intel_commit_scheduling 0
intel_cpuc_finish 0
intel_cpuc_prepare 4
intel_event_sysfs_show 0
intel_fixup_er 0
intel_get_event_constraints 0
intel_get_excl_constraints 0
intel_guest_get_msrs 0
intel_ht_bug 1
intel_nehalem_quirk 0
intel_pebs_aliases_core2 0
intel_pebs_aliases_ivb 0
intel_pebs_aliases_skl 0
intel_pebs_aliases_snb 0
intel_pebs_isolation_quirk 1
intel_pmu_add_event 0
intel_pmu_aux_output_match 0
intel_pmu_bts_config 0
intel_pmu_check_period 0
intel_pmu_cpu_dead 0
intel_pmu_cpu_dying 0
intel_pmu_cpu_prepare 4
intel_pmu_cpu_starting 4
intel_pmu_del_event 0
intel_pmu_disable_all 0
intel_pmu_disable_event 0
intel_pmu_disable_fixed 0
intel_pmu_enable_all 0
intel_pmu_enable_event 0
intel_pmu_enable_fixed 0
intel_pmu_event_map 10
intel_pmu_handle_irq 0
intel_pmu_hw_config 0
intel_pmu_init 1
intel_pmu_large_pebs_flags 0
intel_pmu_nhm_enable_all 0
intel_pmu_nhm_workaround 0
intel_pmu_read_event 0
intel_pmu_read_topdown_event 0
intel_pmu_reset 0
intel_pmu_save_and_restart 0
intel_pmu_sched_task 0
intel_pmu_swap_task_ctx 0
intel_put_event_constraints 0
intel_put_excl_constraints 0
intel_put_shared_regs_event_constraints 0
intel_sandybridge_quirk 0
intel_set_masks 0
intel_set_tfa 0
intel_shared_regs_constraints 0
intel_snb_check_microcode 0
intel_start_scheduling 0
intel_stop_scheduling 0
intel_tfa_commit_scheduling 0
intel_tfa_pmu_enable_all 0
intel_update_topdown_event 0
inv_show 0
is_available_metric_event 0
lbr_is_visible 1
ldlat_show 0
nhm_limit_period 0
offcore_rsp_show 0
pc_show 0
pebs_is_visible 2
pmu_name_show 0
set_sysctl_tfa 0
show_sysctl_tfa 0
spr_get_event_constraints 0
spr_limit_period 0
tfa_get_event_constraints 0
tnt_get_event_constraints 0
tsx_is_visible 12
umask_show 0
update_saved_topdown_regs 0
update_tfa_sched 0
x86_get_event_constraints 0

Generated by: LCOV version 1.14