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1 : /* SPDX-License-Identifier: GPL-2.0 */ 2 : #ifndef _ASM_X86_SPECCTRL_H_ 3 : #define _ASM_X86_SPECCTRL_H_ 4 : 5 : #include <linux/thread_info.h> 6 : #include <asm/nospec-branch.h> 7 : 8 : /* 9 : * On VMENTER we must preserve whatever view of the SPEC_CTRL MSR 10 : * the guest has, while on VMEXIT we restore the host view. This 11 : * would be easier if SPEC_CTRL were architecturally maskable or 12 : * shadowable for guests but this is not (currently) the case. 13 : * Takes the guest view of SPEC_CTRL MSR as a parameter and also 14 : * the guest's version of VIRT_SPEC_CTRL, if emulated. 15 : */ 16 : extern void x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool guest); 17 : 18 : /** 19 : * x86_spec_ctrl_set_guest - Set speculation control registers for the guest 20 : * @guest_spec_ctrl: The guest content of MSR_SPEC_CTRL 21 : * @guest_virt_spec_ctrl: The guest controlled bits of MSR_VIRT_SPEC_CTRL 22 : * (may get translated to MSR_AMD64_LS_CFG bits) 23 : * 24 : * Avoids writing to the MSR if the content/bits are the same 25 : */ 26 : static inline 27 : void x86_spec_ctrl_set_guest(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl) 28 : { 29 : x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, true); 30 : } 31 : 32 : /** 33 : * x86_spec_ctrl_restore_host - Restore host speculation control registers 34 : * @guest_spec_ctrl: The guest content of MSR_SPEC_CTRL 35 : * @guest_virt_spec_ctrl: The guest controlled bits of MSR_VIRT_SPEC_CTRL 36 : * (may get translated to MSR_AMD64_LS_CFG bits) 37 : * 38 : * Avoids writing to the MSR if the content/bits are the same 39 : */ 40 : static inline 41 : void x86_spec_ctrl_restore_host(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl) 42 : { 43 : x86_virt_spec_ctrl(guest_spec_ctrl, guest_virt_spec_ctrl, false); 44 : } 45 : 46 : /* AMD specific Speculative Store Bypass MSR data */ 47 : extern u64 x86_amd_ls_cfg_base; 48 : extern u64 x86_amd_ls_cfg_ssbd_mask; 49 : 50 0 : static inline u64 ssbd_tif_to_spec_ctrl(u64 tifn) 51 : { 52 0 : BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT); 53 0 : return (tifn & _TIF_SSBD) >> (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT); 54 : } 55 : 56 0 : static inline u64 stibp_tif_to_spec_ctrl(u64 tifn) 57 : { 58 0 : BUILD_BUG_ON(TIF_SPEC_IB < SPEC_CTRL_STIBP_SHIFT); 59 0 : return (tifn & _TIF_SPEC_IB) >> (TIF_SPEC_IB - SPEC_CTRL_STIBP_SHIFT); 60 : } 61 : 62 0 : static inline unsigned long ssbd_spec_ctrl_to_tif(u64 spec_ctrl) 63 : { 64 0 : BUILD_BUG_ON(TIF_SSBD < SPEC_CTRL_SSBD_SHIFT); 65 0 : return (spec_ctrl & SPEC_CTRL_SSBD) << (TIF_SSBD - SPEC_CTRL_SSBD_SHIFT); 66 : } 67 : 68 : static inline unsigned long stibp_spec_ctrl_to_tif(u64 spec_ctrl) 69 : { 70 : BUILD_BUG_ON(TIF_SPEC_IB < SPEC_CTRL_STIBP_SHIFT); 71 : return (spec_ctrl & SPEC_CTRL_STIBP) << (TIF_SPEC_IB - SPEC_CTRL_STIBP_SHIFT); 72 : } 73 : 74 0 : static inline u64 ssbd_tif_to_amd_ls_cfg(u64 tifn) 75 : { 76 0 : return (tifn & _TIF_SSBD) ? x86_amd_ls_cfg_ssbd_mask : 0ULL; 77 : } 78 : 79 : #ifdef CONFIG_SMP 80 : extern void speculative_store_bypass_ht_init(void); 81 : #else 82 : static inline void speculative_store_bypass_ht_init(void) { } 83 : #endif 84 : 85 : extern void speculation_ctrl_update(unsigned long tif); 86 : extern void speculation_ctrl_update_current(void); 87 : 88 : #endif