LCOV - code coverage report
Current view: top level - arch/x86/include/asm - tsc.h (source / functions) Hit Total Coverage
Test: landlock.info Lines: 2 2 100.0 %
Date: 2021-04-22 12:43:58 Functions: 0 0 -

          Line data    Source code
       1             : /* SPDX-License-Identifier: GPL-2.0 */
       2             : /*
       3             :  * x86 TSC related functions
       4             :  */
       5             : #ifndef _ASM_X86_TSC_H
       6             : #define _ASM_X86_TSC_H
       7             : 
       8             : #include <asm/processor.h>
       9             : #include <asm/cpufeature.h>
      10             : 
      11             : /*
      12             :  * Standard way to access the cycle counter.
      13             :  */
      14             : typedef unsigned long long cycles_t;
      15             : 
      16             : extern unsigned int cpu_khz;
      17             : extern unsigned int tsc_khz;
      18             : 
      19             : extern void disable_TSC(void);
      20             : 
      21       33633 : static inline cycles_t get_cycles(void)
      22             : {
      23             : #ifndef CONFIG_X86_TSC
      24             :         if (!boot_cpu_has(X86_FEATURE_TSC))
      25             :                 return 0;
      26             : #endif
      27             : 
      28       33633 :         return rdtsc();
      29             : }
      30             : 
      31             : extern struct system_counterval_t convert_art_to_tsc(u64 art);
      32             : extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns);
      33             : 
      34             : extern void tsc_early_init(void);
      35             : extern void tsc_init(void);
      36             : extern unsigned long calibrate_delay_is_known(void);
      37             : extern void mark_tsc_unstable(char *reason);
      38             : extern int unsynchronized_tsc(void);
      39             : extern int check_tsc_unstable(void);
      40             : extern void mark_tsc_async_resets(char *reason);
      41             : extern unsigned long native_calibrate_cpu_early(void);
      42             : extern unsigned long native_calibrate_tsc(void);
      43             : extern unsigned long long native_sched_clock_from_tsc(u64 tsc);
      44             : 
      45             : extern int tsc_clocksource_reliable;
      46             : #ifdef CONFIG_X86_TSC
      47             : extern bool tsc_async_resets;
      48             : #else
      49             : # define tsc_async_resets       false
      50             : #endif
      51             : 
      52             : /*
      53             :  * Boot-time check whether the TSCs are synchronized across
      54             :  * all CPUs/cores:
      55             :  */
      56             : #ifdef CONFIG_X86_TSC
      57             : extern bool tsc_store_and_check_tsc_adjust(bool bootcpu);
      58             : extern void tsc_verify_tsc_adjust(bool resume);
      59             : extern void check_tsc_sync_source(int cpu);
      60             : extern void check_tsc_sync_target(void);
      61             : #else
      62             : static inline bool tsc_store_and_check_tsc_adjust(bool bootcpu) { return false; }
      63             : static inline void tsc_verify_tsc_adjust(bool resume) { }
      64             : static inline void check_tsc_sync_source(int cpu) { }
      65             : static inline void check_tsc_sync_target(void) { }
      66             : #endif
      67             : 
      68             : extern int notsc_setup(char *);
      69             : extern void tsc_save_sched_clock_state(void);
      70             : extern void tsc_restore_sched_clock_state(void);
      71             : 
      72             : unsigned long cpu_khz_from_msr(void);
      73             : 
      74             : #endif /* _ASM_X86_TSC_H */

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