Line data Source code
1 : // SPDX-License-Identifier: GPL-2.0-or-later
2 : /*
3 : * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 : *
5 : * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 : * Copyright (C) 2006 David Brownell (convert to new framework)
7 : */
8 :
9 : /*
10 : * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 : * That defined the register interface now provided by all PCs, some
12 : * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 : * integrate an MC146818 clone in their southbridge, and boards use
14 : * that instead of discrete clones like the DS12887 or M48T86. There
15 : * are also clones that connect using the LPC bus.
16 : *
17 : * That register API is also used directly by various other drivers
18 : * (notably for integrated NVRAM), infrastructure (x86 has code to
19 : * bypass the RTC framework, directly reading the RTC during boot
20 : * and updating minutes/seconds for systems using NTP synch) and
21 : * utilities (like userspace 'hwclock', if no /dev node exists).
22 : *
23 : * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 : * interrupts disabled, holding the global rtc_lock, to exclude those
25 : * other drivers and utilities on correctly configured systems.
26 : */
27 :
28 : #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29 :
30 : #include <linux/kernel.h>
31 : #include <linux/module.h>
32 : #include <linux/init.h>
33 : #include <linux/interrupt.h>
34 : #include <linux/spinlock.h>
35 : #include <linux/platform_device.h>
36 : #include <linux/log2.h>
37 : #include <linux/pm.h>
38 : #include <linux/of.h>
39 : #include <linux/of_platform.h>
40 : #ifdef CONFIG_X86
41 : #include <asm/i8259.h>
42 : #include <asm/processor.h>
43 : #include <linux/dmi.h>
44 : #endif
45 :
46 : /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47 : #include <linux/mc146818rtc.h>
48 :
49 : #ifdef CONFIG_ACPI
50 : /*
51 : * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 : *
53 : * If cleared, ACPI SCI is only used to wake up the system from suspend
54 : *
55 : * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 : */
57 :
58 : static bool use_acpi_alarm;
59 : module_param(use_acpi_alarm, bool, 0444);
60 :
61 : static inline int cmos_use_acpi_alarm(void)
62 : {
63 : return use_acpi_alarm;
64 : }
65 : #else /* !CONFIG_ACPI */
66 :
67 : static inline int cmos_use_acpi_alarm(void)
68 : {
69 : return 0;
70 : }
71 : #endif
72 :
73 : struct cmos_rtc {
74 : struct rtc_device *rtc;
75 : struct device *dev;
76 : int irq;
77 : struct resource *iomem;
78 : time64_t alarm_expires;
79 :
80 : void (*wake_on)(struct device *);
81 : void (*wake_off)(struct device *);
82 :
83 : u8 enabled_wake;
84 : u8 suspend_ctrl;
85 :
86 : /* newer hardware extends the original register set */
87 : u8 day_alrm;
88 : u8 mon_alrm;
89 : u8 century;
90 :
91 : struct rtc_wkalrm saved_wkalrm;
92 : };
93 :
94 : /* both platform and pnp busses use negative numbers for invalid irqs */
95 : #define is_valid_irq(n) ((n) > 0)
96 :
97 : static const char driver_name[] = "rtc_cmos";
98 :
99 : /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 : * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 : * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 : */
103 : #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104 :
105 0 : static inline int is_intr(u8 rtc_intr)
106 : {
107 0 : if (!(rtc_intr & RTC_IRQF))
108 : return 0;
109 0 : return rtc_intr & RTC_IRQMASK;
110 : }
111 :
112 : /*----------------------------------------------------------------*/
113 :
114 : /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 : * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 : * used in a broken "legacy replacement" mode. The breakage includes
117 : * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 : * other (better) use.
119 : *
120 : * When that broken mode is in use, platform glue provides a partial
121 : * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 : * want to use HPET for anything except those IRQs though...
123 : */
124 : #ifdef CONFIG_HPET_EMULATE_RTC
125 : #include <asm/hpet.h>
126 : #else
127 :
128 : static inline int is_hpet_enabled(void)
129 : {
130 : return 0;
131 : }
132 :
133 : static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134 : {
135 : return 0;
136 : }
137 :
138 : static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139 : {
140 : return 0;
141 : }
142 :
143 : static inline int
144 : hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145 : {
146 : return 0;
147 : }
148 :
149 : static inline int hpet_set_periodic_freq(unsigned long freq)
150 : {
151 : return 0;
152 : }
153 :
154 : static inline int hpet_rtc_dropped_irq(void)
155 : {
156 : return 0;
157 : }
158 :
159 : static inline int hpet_rtc_timer_init(void)
160 : {
161 : return 0;
162 : }
163 :
164 : extern irq_handler_t hpet_rtc_interrupt;
165 :
166 : static inline int hpet_register_irq_handler(irq_handler_t handler)
167 : {
168 : return 0;
169 : }
170 :
171 : static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172 : {
173 : return 0;
174 : }
175 :
176 : #endif
177 :
178 : /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179 0 : static inline int use_hpet_alarm(void)
180 : {
181 0 : return is_hpet_enabled() && !cmos_use_acpi_alarm();
182 : }
183 :
184 : /*----------------------------------------------------------------*/
185 :
186 : #ifdef RTC_PORT
187 :
188 : /* Most newer x86 systems have two register banks, the first used
189 : * for RTC and NVRAM and the second only for NVRAM. Caller must
190 : * own rtc_lock ... and we won't worry about access during NMI.
191 : */
192 : #define can_bank2 true
193 :
194 : static inline unsigned char cmos_read_bank2(unsigned char addr)
195 : {
196 : outb(addr, RTC_PORT(2));
197 : return inb(RTC_PORT(3));
198 : }
199 :
200 : static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201 : {
202 : outb(addr, RTC_PORT(2));
203 : outb(val, RTC_PORT(3));
204 : }
205 :
206 : #else
207 :
208 : #define can_bank2 false
209 :
210 : static inline unsigned char cmos_read_bank2(unsigned char addr)
211 : {
212 : return 0;
213 : }
214 :
215 : static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216 : {
217 : }
218 :
219 : #endif
220 :
221 : /*----------------------------------------------------------------*/
222 :
223 0 : static int cmos_read_time(struct device *dev, struct rtc_time *t)
224 : {
225 : /*
226 : * If pm_trace abused the RTC for storage, set the timespec to 0,
227 : * which tells the caller that this RTC value is unusable.
228 : */
229 0 : if (!pm_trace_rtc_valid())
230 : return -EIO;
231 :
232 : /* REVISIT: if the clock has a "century" register, use
233 : * that instead of the heuristic in mc146818_get_time().
234 : * That'll make Y3K compatility (year > 2070) easy!
235 : */
236 0 : mc146818_get_time(t);
237 0 : return 0;
238 : }
239 :
240 0 : static int cmos_set_time(struct device *dev, struct rtc_time *t)
241 : {
242 : /* REVISIT: set the "century" register if available
243 : *
244 : * NOTE: this ignores the issue whereby updating the seconds
245 : * takes effect exactly 500ms after we write the register.
246 : * (Also queueing and other delays before we get this far.)
247 : */
248 0 : return mc146818_set_time(t);
249 : }
250 :
251 0 : static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
252 : {
253 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
254 0 : unsigned char rtc_control;
255 :
256 : /* This not only a rtc_op, but also called directly */
257 0 : if (!is_valid_irq(cmos->irq))
258 : return -EIO;
259 :
260 : /* Basic alarms only support hour, minute, and seconds fields.
261 : * Some also support day and month, for alarms up to a year in
262 : * the future.
263 : */
264 :
265 0 : spin_lock_irq(&rtc_lock);
266 0 : t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
267 0 : t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
268 0 : t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
269 :
270 0 : if (cmos->day_alrm) {
271 : /* ignore upper bits on readback per ACPI spec */
272 0 : t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
273 0 : if (!t->time.tm_mday)
274 0 : t->time.tm_mday = -1;
275 :
276 0 : if (cmos->mon_alrm) {
277 0 : t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
278 0 : if (!t->time.tm_mon)
279 0 : t->time.tm_mon = -1;
280 : }
281 : }
282 :
283 0 : rtc_control = CMOS_READ(RTC_CONTROL);
284 0 : spin_unlock_irq(&rtc_lock);
285 :
286 0 : if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
287 0 : if (((unsigned)t->time.tm_sec) < 0x60)
288 0 : t->time.tm_sec = bcd2bin(t->time.tm_sec);
289 : else
290 0 : t->time.tm_sec = -1;
291 0 : if (((unsigned)t->time.tm_min) < 0x60)
292 0 : t->time.tm_min = bcd2bin(t->time.tm_min);
293 : else
294 0 : t->time.tm_min = -1;
295 0 : if (((unsigned)t->time.tm_hour) < 0x24)
296 0 : t->time.tm_hour = bcd2bin(t->time.tm_hour);
297 : else
298 0 : t->time.tm_hour = -1;
299 :
300 0 : if (cmos->day_alrm) {
301 0 : if (((unsigned)t->time.tm_mday) <= 0x31)
302 0 : t->time.tm_mday = bcd2bin(t->time.tm_mday);
303 : else
304 0 : t->time.tm_mday = -1;
305 :
306 0 : if (cmos->mon_alrm) {
307 0 : if (((unsigned)t->time.tm_mon) <= 0x12)
308 0 : t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
309 : else
310 0 : t->time.tm_mon = -1;
311 : }
312 : }
313 : }
314 :
315 0 : t->enabled = !!(rtc_control & RTC_AIE);
316 0 : t->pending = 0;
317 :
318 0 : return 0;
319 : }
320 :
321 0 : static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
322 : {
323 0 : unsigned char rtc_intr;
324 :
325 : /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
326 : * allegedly some older rtcs need that to handle irqs properly
327 : */
328 0 : rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
329 :
330 0 : if (use_hpet_alarm())
331 : return;
332 :
333 0 : rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
334 0 : if (is_intr(rtc_intr))
335 0 : rtc_update_irq(cmos->rtc, 1, rtc_intr);
336 : }
337 :
338 0 : static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
339 : {
340 0 : unsigned char rtc_control;
341 :
342 : /* flush any pending IRQ status, notably for update irqs,
343 : * before we enable new IRQs
344 : */
345 0 : rtc_control = CMOS_READ(RTC_CONTROL);
346 0 : cmos_checkintr(cmos, rtc_control);
347 :
348 0 : rtc_control |= mask;
349 0 : CMOS_WRITE(rtc_control, RTC_CONTROL);
350 0 : if (use_hpet_alarm())
351 0 : hpet_set_rtc_irq_bit(mask);
352 :
353 0 : if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
354 : if (cmos->wake_on)
355 : cmos->wake_on(cmos->dev);
356 : }
357 :
358 0 : cmos_checkintr(cmos, rtc_control);
359 0 : }
360 :
361 0 : static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
362 : {
363 0 : unsigned char rtc_control;
364 :
365 0 : rtc_control = CMOS_READ(RTC_CONTROL);
366 0 : rtc_control &= ~mask;
367 0 : CMOS_WRITE(rtc_control, RTC_CONTROL);
368 0 : if (use_hpet_alarm())
369 0 : hpet_mask_rtc_irq_bit(mask);
370 :
371 0 : if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
372 : if (cmos->wake_off)
373 : cmos->wake_off(cmos->dev);
374 : }
375 :
376 0 : cmos_checkintr(cmos, rtc_control);
377 0 : }
378 :
379 0 : static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
380 : {
381 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
382 0 : struct rtc_time now;
383 :
384 0 : cmos_read_time(dev, &now);
385 :
386 0 : if (!cmos->day_alrm) {
387 0 : time64_t t_max_date;
388 0 : time64_t t_alrm;
389 :
390 0 : t_max_date = rtc_tm_to_time64(&now);
391 0 : t_max_date += 24 * 60 * 60 - 1;
392 0 : t_alrm = rtc_tm_to_time64(&t->time);
393 0 : if (t_alrm > t_max_date) {
394 0 : dev_err(dev,
395 : "Alarms can be up to one day in the future\n");
396 0 : return -EINVAL;
397 : }
398 0 : } else if (!cmos->mon_alrm) {
399 0 : struct rtc_time max_date = now;
400 0 : time64_t t_max_date;
401 0 : time64_t t_alrm;
402 0 : int max_mday;
403 :
404 0 : if (max_date.tm_mon == 11) {
405 0 : max_date.tm_mon = 0;
406 0 : max_date.tm_year += 1;
407 : } else {
408 0 : max_date.tm_mon += 1;
409 : }
410 0 : max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
411 0 : if (max_date.tm_mday > max_mday)
412 0 : max_date.tm_mday = max_mday;
413 :
414 0 : t_max_date = rtc_tm_to_time64(&max_date);
415 0 : t_max_date -= 1;
416 0 : t_alrm = rtc_tm_to_time64(&t->time);
417 0 : if (t_alrm > t_max_date) {
418 0 : dev_err(dev,
419 : "Alarms can be up to one month in the future\n");
420 0 : return -EINVAL;
421 : }
422 : } else {
423 0 : struct rtc_time max_date = now;
424 0 : time64_t t_max_date;
425 0 : time64_t t_alrm;
426 0 : int max_mday;
427 :
428 0 : max_date.tm_year += 1;
429 0 : max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
430 0 : if (max_date.tm_mday > max_mday)
431 0 : max_date.tm_mday = max_mday;
432 :
433 0 : t_max_date = rtc_tm_to_time64(&max_date);
434 0 : t_max_date -= 1;
435 0 : t_alrm = rtc_tm_to_time64(&t->time);
436 0 : if (t_alrm > t_max_date) {
437 0 : dev_err(dev,
438 : "Alarms can be up to one year in the future\n");
439 0 : return -EINVAL;
440 : }
441 : }
442 :
443 : return 0;
444 : }
445 :
446 0 : static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
447 : {
448 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
449 0 : unsigned char mon, mday, hrs, min, sec, rtc_control;
450 0 : int ret;
451 :
452 : /* This not only a rtc_op, but also called directly */
453 0 : if (!is_valid_irq(cmos->irq))
454 : return -EIO;
455 :
456 0 : ret = cmos_validate_alarm(dev, t);
457 0 : if (ret < 0)
458 : return ret;
459 :
460 0 : mon = t->time.tm_mon + 1;
461 0 : mday = t->time.tm_mday;
462 0 : hrs = t->time.tm_hour;
463 0 : min = t->time.tm_min;
464 0 : sec = t->time.tm_sec;
465 :
466 0 : rtc_control = CMOS_READ(RTC_CONTROL);
467 0 : if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
468 : /* Writing 0xff means "don't care" or "match all". */
469 0 : mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
470 0 : mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
471 0 : hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
472 0 : min = (min < 60) ? bin2bcd(min) : 0xff;
473 0 : sec = (sec < 60) ? bin2bcd(sec) : 0xff;
474 : }
475 :
476 0 : spin_lock_irq(&rtc_lock);
477 :
478 : /* next rtc irq must not be from previous alarm setting */
479 0 : cmos_irq_disable(cmos, RTC_AIE);
480 :
481 : /* update alarm */
482 0 : CMOS_WRITE(hrs, RTC_HOURS_ALARM);
483 0 : CMOS_WRITE(min, RTC_MINUTES_ALARM);
484 0 : CMOS_WRITE(sec, RTC_SECONDS_ALARM);
485 :
486 : /* the system may support an "enhanced" alarm */
487 0 : if (cmos->day_alrm) {
488 0 : CMOS_WRITE(mday, cmos->day_alrm);
489 0 : if (cmos->mon_alrm)
490 0 : CMOS_WRITE(mon, cmos->mon_alrm);
491 : }
492 :
493 0 : if (use_hpet_alarm()) {
494 : /*
495 : * FIXME the HPET alarm glue currently ignores day_alrm
496 : * and mon_alrm ...
497 : */
498 0 : hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
499 0 : t->time.tm_sec);
500 : }
501 :
502 0 : if (t->enabled)
503 0 : cmos_irq_enable(cmos, RTC_AIE);
504 :
505 0 : spin_unlock_irq(&rtc_lock);
506 :
507 0 : cmos->alarm_expires = rtc_tm_to_time64(&t->time);
508 :
509 0 : return 0;
510 : }
511 :
512 0 : static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
513 : {
514 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
515 0 : unsigned long flags;
516 :
517 0 : spin_lock_irqsave(&rtc_lock, flags);
518 :
519 0 : if (enabled)
520 0 : cmos_irq_enable(cmos, RTC_AIE);
521 : else
522 0 : cmos_irq_disable(cmos, RTC_AIE);
523 :
524 0 : spin_unlock_irqrestore(&rtc_lock, flags);
525 0 : return 0;
526 : }
527 :
528 : #if IS_ENABLED(CONFIG_RTC_INTF_PROC)
529 :
530 : static int cmos_procfs(struct device *dev, struct seq_file *seq)
531 : {
532 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
533 : unsigned char rtc_control, valid;
534 :
535 : spin_lock_irq(&rtc_lock);
536 : rtc_control = CMOS_READ(RTC_CONTROL);
537 : valid = CMOS_READ(RTC_VALID);
538 : spin_unlock_irq(&rtc_lock);
539 :
540 : /* NOTE: at least ICH6 reports battery status using a different
541 : * (non-RTC) bit; and SQWE is ignored on many current systems.
542 : */
543 : seq_printf(seq,
544 : "periodic_IRQ\t: %s\n"
545 : "update_IRQ\t: %s\n"
546 : "HPET_emulated\t: %s\n"
547 : // "square_wave\t: %s\n"
548 : "BCD\t\t: %s\n"
549 : "DST_enable\t: %s\n"
550 : "periodic_freq\t: %d\n"
551 : "batt_status\t: %s\n",
552 : (rtc_control & RTC_PIE) ? "yes" : "no",
553 : (rtc_control & RTC_UIE) ? "yes" : "no",
554 : use_hpet_alarm() ? "yes" : "no",
555 : // (rtc_control & RTC_SQWE) ? "yes" : "no",
556 : (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
557 : (rtc_control & RTC_DST_EN) ? "yes" : "no",
558 : cmos->rtc->irq_freq,
559 : (valid & RTC_VRT) ? "okay" : "dead");
560 :
561 : return 0;
562 : }
563 :
564 : #else
565 : #define cmos_procfs NULL
566 : #endif
567 :
568 : static const struct rtc_class_ops cmos_rtc_ops = {
569 : .read_time = cmos_read_time,
570 : .set_time = cmos_set_time,
571 : .read_alarm = cmos_read_alarm,
572 : .set_alarm = cmos_set_alarm,
573 : .proc = cmos_procfs,
574 : .alarm_irq_enable = cmos_alarm_irq_enable,
575 : };
576 :
577 : /*----------------------------------------------------------------*/
578 :
579 : /*
580 : * All these chips have at least 64 bytes of address space, shared by
581 : * RTC registers and NVRAM. Most of those bytes of NVRAM are used
582 : * by boot firmware. Modern chips have 128 or 256 bytes.
583 : */
584 :
585 : #define NVRAM_OFFSET (RTC_REG_D + 1)
586 :
587 : static int cmos_nvram_read(void *priv, unsigned int off, void *val,
588 : size_t count)
589 : {
590 : unsigned char *buf = val;
591 : int retval;
592 :
593 : off += NVRAM_OFFSET;
594 : spin_lock_irq(&rtc_lock);
595 : for (retval = 0; count; count--, off++, retval++) {
596 : if (off < 128)
597 : *buf++ = CMOS_READ(off);
598 : else if (can_bank2)
599 : *buf++ = cmos_read_bank2(off);
600 : else
601 : break;
602 : }
603 : spin_unlock_irq(&rtc_lock);
604 :
605 : return retval;
606 : }
607 :
608 : static int cmos_nvram_write(void *priv, unsigned int off, void *val,
609 : size_t count)
610 : {
611 : struct cmos_rtc *cmos = priv;
612 : unsigned char *buf = val;
613 : int retval;
614 :
615 : /* NOTE: on at least PCs and Ataris, the boot firmware uses a
616 : * checksum on part of the NVRAM data. That's currently ignored
617 : * here. If userspace is smart enough to know what fields of
618 : * NVRAM to update, updating checksums is also part of its job.
619 : */
620 : off += NVRAM_OFFSET;
621 : spin_lock_irq(&rtc_lock);
622 : for (retval = 0; count; count--, off++, retval++) {
623 : /* don't trash RTC registers */
624 : if (off == cmos->day_alrm
625 : || off == cmos->mon_alrm
626 : || off == cmos->century)
627 : buf++;
628 : else if (off < 128)
629 : CMOS_WRITE(*buf++, off);
630 : else if (can_bank2)
631 : cmos_write_bank2(*buf++, off);
632 : else
633 : break;
634 : }
635 : spin_unlock_irq(&rtc_lock);
636 :
637 : return retval;
638 : }
639 :
640 : /*----------------------------------------------------------------*/
641 :
642 : static struct cmos_rtc cmos_rtc;
643 :
644 0 : static irqreturn_t cmos_interrupt(int irq, void *p)
645 : {
646 0 : u8 irqstat;
647 0 : u8 rtc_control;
648 :
649 0 : spin_lock(&rtc_lock);
650 :
651 : /* When the HPET interrupt handler calls us, the interrupt
652 : * status is passed as arg1 instead of the irq number. But
653 : * always clear irq status, even when HPET is in the way.
654 : *
655 : * Note that HPET and RTC are almost certainly out of phase,
656 : * giving different IRQ status ...
657 : */
658 0 : irqstat = CMOS_READ(RTC_INTR_FLAGS);
659 0 : rtc_control = CMOS_READ(RTC_CONTROL);
660 0 : if (use_hpet_alarm())
661 0 : irqstat = (unsigned long)irq & 0xF0;
662 :
663 : /* If we were suspended, RTC_CONTROL may not be accurate since the
664 : * bios may have cleared it.
665 : */
666 0 : if (!cmos_rtc.suspend_ctrl)
667 0 : irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
668 : else
669 0 : irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
670 :
671 : /* All Linux RTC alarms should be treated as if they were oneshot.
672 : * Similar code may be needed in system wakeup paths, in case the
673 : * alarm woke the system.
674 : */
675 0 : if (irqstat & RTC_AIE) {
676 0 : cmos_rtc.suspend_ctrl &= ~RTC_AIE;
677 0 : rtc_control &= ~RTC_AIE;
678 0 : CMOS_WRITE(rtc_control, RTC_CONTROL);
679 0 : if (use_hpet_alarm())
680 0 : hpet_mask_rtc_irq_bit(RTC_AIE);
681 0 : CMOS_READ(RTC_INTR_FLAGS);
682 : }
683 0 : spin_unlock(&rtc_lock);
684 :
685 0 : if (is_intr(irqstat)) {
686 0 : rtc_update_irq(p, 1, irqstat);
687 0 : return IRQ_HANDLED;
688 : } else
689 : return IRQ_NONE;
690 : }
691 :
692 : #ifdef CONFIG_PNP
693 : #define INITSECTION
694 :
695 : #else
696 : #define INITSECTION __init
697 : #endif
698 :
699 : static int INITSECTION
700 1 : cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
701 : {
702 1 : struct cmos_rtc_board_info *info = dev_get_platdata(dev);
703 1 : int retval = 0;
704 1 : unsigned char rtc_control;
705 1 : unsigned address_space;
706 1 : u32 flags = 0;
707 1 : struct nvmem_config nvmem_cfg = {
708 : .name = "cmos_nvram",
709 : .word_size = 1,
710 : .stride = 1,
711 : .reg_read = cmos_nvram_read,
712 : .reg_write = cmos_nvram_write,
713 : .priv = &cmos_rtc,
714 : };
715 :
716 : /* there can be only one ... */
717 1 : if (cmos_rtc.dev)
718 : return -EBUSY;
719 :
720 1 : if (!ports)
721 : return -ENODEV;
722 :
723 : /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
724 : *
725 : * REVISIT non-x86 systems may instead use memory space resources
726 : * (needing ioremap etc), not i/o space resources like this ...
727 : */
728 1 : if (RTC_IOMAPPED)
729 1 : ports = request_region(ports->start, resource_size(ports),
730 : driver_name);
731 : else
732 : ports = request_mem_region(ports->start, resource_size(ports),
733 : driver_name);
734 1 : if (!ports) {
735 : dev_dbg(dev, "i/o registers already in use\n");
736 : return -EBUSY;
737 : }
738 :
739 1 : cmos_rtc.irq = rtc_irq;
740 1 : cmos_rtc.iomem = ports;
741 :
742 : /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
743 : * driver did, but don't reject unknown configs. Old hardware
744 : * won't address 128 bytes. Newer chips have multiple banks,
745 : * though they may not be listed in one I/O resource.
746 : */
747 : #if defined(CONFIG_ATARI)
748 : address_space = 64;
749 : #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
750 : || defined(__sparc__) || defined(__mips__) \
751 : || defined(__powerpc__)
752 1 : address_space = 128;
753 : #else
754 : #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
755 : address_space = 128;
756 : #endif
757 1 : if (can_bank2 && ports->end > (ports->start + 1))
758 0 : address_space = 256;
759 :
760 : /* For ACPI systems extension info comes from the FADT. On others,
761 : * board specific setup provides it as appropriate. Systems where
762 : * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
763 : * some almost-clones) can provide hooks to make that behave.
764 : *
765 : * Note that ACPI doesn't preclude putting these registers into
766 : * "extended" areas of the chip, including some that we won't yet
767 : * expect CMOS_READ and friends to handle.
768 : */
769 1 : if (info) {
770 0 : if (info->flags)
771 : flags = info->flags;
772 0 : if (info->address_space)
773 0 : address_space = info->address_space;
774 :
775 0 : if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
776 0 : cmos_rtc.day_alrm = info->rtc_day_alarm;
777 0 : if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
778 0 : cmos_rtc.mon_alrm = info->rtc_mon_alarm;
779 0 : if (info->rtc_century && info->rtc_century < 128)
780 0 : cmos_rtc.century = info->rtc_century;
781 :
782 0 : if (info->wake_on && info->wake_off) {
783 0 : cmos_rtc.wake_on = info->wake_on;
784 0 : cmos_rtc.wake_off = info->wake_off;
785 : }
786 : }
787 :
788 1 : cmos_rtc.dev = dev;
789 1 : dev_set_drvdata(dev, &cmos_rtc);
790 :
791 1 : cmos_rtc.rtc = devm_rtc_allocate_device(dev);
792 1 : if (IS_ERR(cmos_rtc.rtc)) {
793 0 : retval = PTR_ERR(cmos_rtc.rtc);
794 0 : goto cleanup0;
795 : }
796 :
797 1 : rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
798 :
799 1 : spin_lock_irq(&rtc_lock);
800 :
801 : /* Ensure that the RTC is accessible. Bit 6 must be 0! */
802 1 : if ((CMOS_READ(RTC_VALID) & 0x40) != 0) {
803 1 : spin_unlock_irq(&rtc_lock);
804 1 : dev_warn(dev, "not accessible\n");
805 1 : retval = -ENXIO;
806 1 : goto cleanup1;
807 : }
808 :
809 0 : if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
810 : /* force periodic irq to CMOS reset default of 1024Hz;
811 : *
812 : * REVISIT it's been reported that at least one x86_64 ALI
813 : * mobo doesn't use 32KHz here ... for portability we might
814 : * need to do something about other clock frequencies.
815 : */
816 0 : cmos_rtc.rtc->irq_freq = 1024;
817 0 : if (use_hpet_alarm())
818 0 : hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
819 0 : CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
820 : }
821 :
822 : /* disable irqs */
823 0 : if (is_valid_irq(rtc_irq))
824 0 : cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
825 :
826 0 : rtc_control = CMOS_READ(RTC_CONTROL);
827 :
828 0 : spin_unlock_irq(&rtc_lock);
829 :
830 0 : if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
831 0 : dev_warn(dev, "only 24-hr supported\n");
832 0 : retval = -ENXIO;
833 0 : goto cleanup1;
834 : }
835 :
836 0 : if (use_hpet_alarm())
837 0 : hpet_rtc_timer_init();
838 :
839 0 : if (is_valid_irq(rtc_irq)) {
840 0 : irq_handler_t rtc_cmos_int_handler;
841 :
842 0 : if (use_hpet_alarm()) {
843 0 : rtc_cmos_int_handler = hpet_rtc_interrupt;
844 0 : retval = hpet_register_irq_handler(cmos_interrupt);
845 0 : if (retval) {
846 0 : hpet_mask_rtc_irq_bit(RTC_IRQMASK);
847 0 : dev_warn(dev, "hpet_register_irq_handler "
848 : " failed in rtc_init().");
849 0 : goto cleanup1;
850 : }
851 : } else
852 : rtc_cmos_int_handler = cmos_interrupt;
853 :
854 0 : retval = request_irq(rtc_irq, rtc_cmos_int_handler,
855 0 : 0, dev_name(&cmos_rtc.rtc->dev),
856 0 : cmos_rtc.rtc);
857 0 : if (retval < 0) {
858 0 : dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
859 0 : goto cleanup1;
860 : }
861 : } else {
862 0 : clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
863 : }
864 :
865 0 : cmos_rtc.rtc->ops = &cmos_rtc_ops;
866 :
867 0 : retval = devm_rtc_register_device(cmos_rtc.rtc);
868 0 : if (retval)
869 0 : goto cleanup2;
870 :
871 : /* Set the sync offset for the periodic 11min update correct */
872 0 : cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
873 :
874 : /* export at least the first block of NVRAM */
875 0 : nvmem_cfg.size = address_space - NVRAM_OFFSET;
876 0 : devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
877 :
878 0 : dev_info(dev, "%s%s, %d bytes nvram%s\n",
879 : !is_valid_irq(rtc_irq) ? "no alarms" :
880 : cmos_rtc.mon_alrm ? "alarms up to one year" :
881 : cmos_rtc.day_alrm ? "alarms up to one month" :
882 : "alarms up to one day",
883 : cmos_rtc.century ? ", y3k" : "",
884 : nvmem_cfg.size,
885 : use_hpet_alarm() ? ", hpet irqs" : "");
886 :
887 0 : return 0;
888 :
889 0 : cleanup2:
890 0 : if (is_valid_irq(rtc_irq))
891 0 : free_irq(rtc_irq, cmos_rtc.rtc);
892 0 : cleanup1:
893 1 : cmos_rtc.dev = NULL;
894 1 : cleanup0:
895 1 : if (RTC_IOMAPPED)
896 1 : release_region(ports->start, resource_size(ports));
897 : else
898 : release_mem_region(ports->start, resource_size(ports));
899 1 : return retval;
900 : }
901 :
902 0 : static void cmos_do_shutdown(int rtc_irq)
903 : {
904 0 : spin_lock_irq(&rtc_lock);
905 0 : if (is_valid_irq(rtc_irq))
906 0 : cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
907 0 : spin_unlock_irq(&rtc_lock);
908 0 : }
909 :
910 0 : static void cmos_do_remove(struct device *dev)
911 : {
912 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
913 0 : struct resource *ports;
914 :
915 0 : cmos_do_shutdown(cmos->irq);
916 :
917 0 : if (is_valid_irq(cmos->irq)) {
918 0 : free_irq(cmos->irq, cmos->rtc);
919 0 : if (use_hpet_alarm())
920 0 : hpet_unregister_irq_handler(cmos_interrupt);
921 : }
922 :
923 0 : cmos->rtc = NULL;
924 :
925 0 : ports = cmos->iomem;
926 0 : if (RTC_IOMAPPED)
927 0 : release_region(ports->start, resource_size(ports));
928 : else
929 : release_mem_region(ports->start, resource_size(ports));
930 0 : cmos->iomem = NULL;
931 :
932 0 : cmos->dev = NULL;
933 0 : }
934 :
935 0 : static int cmos_aie_poweroff(struct device *dev)
936 : {
937 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
938 0 : struct rtc_time now;
939 0 : time64_t t_now;
940 0 : int retval = 0;
941 0 : unsigned char rtc_control;
942 :
943 0 : if (!cmos->alarm_expires)
944 : return -EINVAL;
945 :
946 0 : spin_lock_irq(&rtc_lock);
947 0 : rtc_control = CMOS_READ(RTC_CONTROL);
948 0 : spin_unlock_irq(&rtc_lock);
949 :
950 : /* We only care about the situation where AIE is disabled. */
951 0 : if (rtc_control & RTC_AIE)
952 : return -EBUSY;
953 :
954 0 : cmos_read_time(dev, &now);
955 0 : t_now = rtc_tm_to_time64(&now);
956 :
957 : /*
958 : * When enabling "RTC wake-up" in BIOS setup, the machine reboots
959 : * automatically right after shutdown on some buggy boxes.
960 : * This automatic rebooting issue won't happen when the alarm
961 : * time is larger than now+1 seconds.
962 : *
963 : * If the alarm time is equal to now+1 seconds, the issue can be
964 : * prevented by cancelling the alarm.
965 : */
966 0 : if (cmos->alarm_expires == t_now + 1) {
967 0 : struct rtc_wkalrm alarm;
968 :
969 : /* Cancel the AIE timer by configuring the past time. */
970 0 : rtc_time64_to_tm(t_now - 1, &alarm.time);
971 0 : alarm.enabled = 0;
972 0 : retval = cmos_set_alarm(dev, &alarm);
973 0 : } else if (cmos->alarm_expires > t_now + 1) {
974 0 : retval = -EBUSY;
975 : }
976 :
977 : return retval;
978 : }
979 :
980 : static int cmos_suspend(struct device *dev)
981 : {
982 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
983 : unsigned char tmp;
984 :
985 : /* only the alarm might be a wakeup event source */
986 : spin_lock_irq(&rtc_lock);
987 : cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
988 : if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
989 : unsigned char mask;
990 :
991 : if (device_may_wakeup(dev))
992 : mask = RTC_IRQMASK & ~RTC_AIE;
993 : else
994 : mask = RTC_IRQMASK;
995 : tmp &= ~mask;
996 : CMOS_WRITE(tmp, RTC_CONTROL);
997 : if (use_hpet_alarm())
998 : hpet_mask_rtc_irq_bit(mask);
999 : cmos_checkintr(cmos, tmp);
1000 : }
1001 : spin_unlock_irq(&rtc_lock);
1002 :
1003 : if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1004 : cmos->enabled_wake = 1;
1005 : if (cmos->wake_on)
1006 : cmos->wake_on(dev);
1007 : else
1008 : enable_irq_wake(cmos->irq);
1009 : }
1010 :
1011 : memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1012 : cmos_read_alarm(dev, &cmos->saved_wkalrm);
1013 :
1014 : dev_dbg(dev, "suspend%s, ctrl %02x\n",
1015 : (tmp & RTC_AIE) ? ", alarm may wake" : "",
1016 : tmp);
1017 :
1018 : return 0;
1019 : }
1020 :
1021 : /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1022 : * after a detour through G3 "mechanical off", although the ACPI spec
1023 : * says wakeup should only work from G1/S4 "hibernate". To most users,
1024 : * distinctions between S4 and S5 are pointless. So when the hardware
1025 : * allows, don't draw that distinction.
1026 : */
1027 0 : static inline int cmos_poweroff(struct device *dev)
1028 : {
1029 0 : if (!IS_ENABLED(CONFIG_PM))
1030 0 : return -ENOSYS;
1031 :
1032 : return cmos_suspend(dev);
1033 : }
1034 :
1035 : static void cmos_check_wkalrm(struct device *dev)
1036 : {
1037 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1038 : struct rtc_wkalrm current_alarm;
1039 : time64_t t_now;
1040 : time64_t t_current_expires;
1041 : time64_t t_saved_expires;
1042 : struct rtc_time now;
1043 :
1044 : /* Check if we have RTC Alarm armed */
1045 : if (!(cmos->suspend_ctrl & RTC_AIE))
1046 : return;
1047 :
1048 : cmos_read_time(dev, &now);
1049 : t_now = rtc_tm_to_time64(&now);
1050 :
1051 : /*
1052 : * ACPI RTC wake event is cleared after resume from STR,
1053 : * ACK the rtc irq here
1054 : */
1055 : if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1056 : cmos_interrupt(0, (void *)cmos->rtc);
1057 : return;
1058 : }
1059 :
1060 : memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
1061 : cmos_read_alarm(dev, ¤t_alarm);
1062 : t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
1063 : t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1064 : if (t_current_expires != t_saved_expires ||
1065 : cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1066 : cmos_set_alarm(dev, &cmos->saved_wkalrm);
1067 : }
1068 : }
1069 :
1070 : static void cmos_check_acpi_rtc_status(struct device *dev,
1071 : unsigned char *rtc_control);
1072 :
1073 : static int __maybe_unused cmos_resume(struct device *dev)
1074 : {
1075 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1076 : unsigned char tmp;
1077 :
1078 : if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1079 : if (cmos->wake_off)
1080 : cmos->wake_off(dev);
1081 : else
1082 : disable_irq_wake(cmos->irq);
1083 : cmos->enabled_wake = 0;
1084 : }
1085 :
1086 : /* The BIOS might have changed the alarm, restore it */
1087 : cmos_check_wkalrm(dev);
1088 :
1089 : spin_lock_irq(&rtc_lock);
1090 : tmp = cmos->suspend_ctrl;
1091 : cmos->suspend_ctrl = 0;
1092 : /* re-enable any irqs previously active */
1093 : if (tmp & RTC_IRQMASK) {
1094 : unsigned char mask;
1095 :
1096 : if (device_may_wakeup(dev) && use_hpet_alarm())
1097 : hpet_rtc_timer_init();
1098 :
1099 : do {
1100 : CMOS_WRITE(tmp, RTC_CONTROL);
1101 : if (use_hpet_alarm())
1102 : hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1103 :
1104 : mask = CMOS_READ(RTC_INTR_FLAGS);
1105 : mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1106 : if (!use_hpet_alarm() || !is_intr(mask))
1107 : break;
1108 :
1109 : /* force one-shot behavior if HPET blocked
1110 : * the wake alarm's irq
1111 : */
1112 : rtc_update_irq(cmos->rtc, 1, mask);
1113 : tmp &= ~RTC_AIE;
1114 : hpet_mask_rtc_irq_bit(RTC_AIE);
1115 : } while (mask & RTC_AIE);
1116 :
1117 : if (tmp & RTC_AIE)
1118 : cmos_check_acpi_rtc_status(dev, &tmp);
1119 : }
1120 : spin_unlock_irq(&rtc_lock);
1121 :
1122 : dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1123 :
1124 : return 0;
1125 : }
1126 :
1127 : static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1128 :
1129 : /*----------------------------------------------------------------*/
1130 :
1131 : /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1132 : * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1133 : * probably list them in similar PNPBIOS tables; so PNP is more common.
1134 : *
1135 : * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1136 : * predate even PNPBIOS should set up platform_bus devices.
1137 : */
1138 :
1139 : #ifdef CONFIG_ACPI
1140 :
1141 : #include <linux/acpi.h>
1142 :
1143 : static u32 rtc_handler(void *context)
1144 : {
1145 : struct device *dev = context;
1146 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1147 : unsigned char rtc_control = 0;
1148 : unsigned char rtc_intr;
1149 : unsigned long flags;
1150 :
1151 :
1152 : /*
1153 : * Always update rtc irq when ACPI is used as RTC Alarm.
1154 : * Or else, ACPI SCI is enabled during suspend/resume only,
1155 : * update rtc irq in that case.
1156 : */
1157 : if (cmos_use_acpi_alarm())
1158 : cmos_interrupt(0, (void *)cmos->rtc);
1159 : else {
1160 : /* Fix me: can we use cmos_interrupt() here as well? */
1161 : spin_lock_irqsave(&rtc_lock, flags);
1162 : if (cmos_rtc.suspend_ctrl)
1163 : rtc_control = CMOS_READ(RTC_CONTROL);
1164 : if (rtc_control & RTC_AIE) {
1165 : cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1166 : CMOS_WRITE(rtc_control, RTC_CONTROL);
1167 : rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1168 : rtc_update_irq(cmos->rtc, 1, rtc_intr);
1169 : }
1170 : spin_unlock_irqrestore(&rtc_lock, flags);
1171 : }
1172 :
1173 : pm_wakeup_hard_event(dev);
1174 : acpi_clear_event(ACPI_EVENT_RTC);
1175 : acpi_disable_event(ACPI_EVENT_RTC, 0);
1176 : return ACPI_INTERRUPT_HANDLED;
1177 : }
1178 :
1179 : static inline void rtc_wake_setup(struct device *dev)
1180 : {
1181 : acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1182 : /*
1183 : * After the RTC handler is installed, the Fixed_RTC event should
1184 : * be disabled. Only when the RTC alarm is set will it be enabled.
1185 : */
1186 : acpi_clear_event(ACPI_EVENT_RTC);
1187 : acpi_disable_event(ACPI_EVENT_RTC, 0);
1188 : }
1189 :
1190 : static void rtc_wake_on(struct device *dev)
1191 : {
1192 : acpi_clear_event(ACPI_EVENT_RTC);
1193 : acpi_enable_event(ACPI_EVENT_RTC, 0);
1194 : }
1195 :
1196 : static void rtc_wake_off(struct device *dev)
1197 : {
1198 : acpi_disable_event(ACPI_EVENT_RTC, 0);
1199 : }
1200 :
1201 : #ifdef CONFIG_X86
1202 : /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
1203 : static void use_acpi_alarm_quirks(void)
1204 : {
1205 : if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
1206 : return;
1207 :
1208 : if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
1209 : return;
1210 :
1211 : if (!is_hpet_enabled())
1212 : return;
1213 :
1214 : if (dmi_get_bios_year() < 2015)
1215 : return;
1216 :
1217 : use_acpi_alarm = true;
1218 : }
1219 : #else
1220 : static inline void use_acpi_alarm_quirks(void) { }
1221 : #endif
1222 :
1223 : /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1224 : * its device node and pass extra config data. This helps its driver use
1225 : * capabilities that the now-obsolete mc146818 didn't have, and informs it
1226 : * that this board's RTC is wakeup-capable (per ACPI spec).
1227 : */
1228 : static struct cmos_rtc_board_info acpi_rtc_info;
1229 :
1230 : static void cmos_wake_setup(struct device *dev)
1231 : {
1232 : if (acpi_disabled)
1233 : return;
1234 :
1235 : use_acpi_alarm_quirks();
1236 :
1237 : rtc_wake_setup(dev);
1238 : acpi_rtc_info.wake_on = rtc_wake_on;
1239 : acpi_rtc_info.wake_off = rtc_wake_off;
1240 :
1241 : /* workaround bug in some ACPI tables */
1242 : if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1243 : dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1244 : acpi_gbl_FADT.month_alarm);
1245 : acpi_gbl_FADT.month_alarm = 0;
1246 : }
1247 :
1248 : acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1249 : acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1250 : acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1251 :
1252 : /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1253 : if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1254 : dev_info(dev, "RTC can wake from S4\n");
1255 :
1256 : dev->platform_data = &acpi_rtc_info;
1257 :
1258 : /* RTC always wakes from S1/S2/S3, and often S4/STD */
1259 : device_init_wakeup(dev, 1);
1260 : }
1261 :
1262 : static void cmos_check_acpi_rtc_status(struct device *dev,
1263 : unsigned char *rtc_control)
1264 : {
1265 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1266 : acpi_event_status rtc_status;
1267 : acpi_status status;
1268 :
1269 : if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1270 : return;
1271 :
1272 : status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1273 : if (ACPI_FAILURE(status)) {
1274 : dev_err(dev, "Could not get RTC status\n");
1275 : } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1276 : unsigned char mask;
1277 : *rtc_control &= ~RTC_AIE;
1278 : CMOS_WRITE(*rtc_control, RTC_CONTROL);
1279 : mask = CMOS_READ(RTC_INTR_FLAGS);
1280 : rtc_update_irq(cmos->rtc, 1, mask);
1281 : }
1282 : }
1283 :
1284 : #else
1285 :
1286 1 : static void cmos_wake_setup(struct device *dev)
1287 : {
1288 1 : }
1289 :
1290 : static void cmos_check_acpi_rtc_status(struct device *dev,
1291 : unsigned char *rtc_control)
1292 : {
1293 : }
1294 :
1295 : #endif
1296 :
1297 : #ifdef CONFIG_PNP
1298 :
1299 : #include <linux/pnp.h>
1300 :
1301 : static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1302 : {
1303 : cmos_wake_setup(&pnp->dev);
1304 :
1305 : if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1306 : unsigned int irq = 0;
1307 : #ifdef CONFIG_X86
1308 : /* Some machines contain a PNP entry for the RTC, but
1309 : * don't define the IRQ. It should always be safe to
1310 : * hardcode it on systems with a legacy PIC.
1311 : */
1312 : if (nr_legacy_irqs())
1313 : irq = RTC_IRQ;
1314 : #endif
1315 : return cmos_do_probe(&pnp->dev,
1316 : pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1317 : } else {
1318 : return cmos_do_probe(&pnp->dev,
1319 : pnp_get_resource(pnp, IORESOURCE_IO, 0),
1320 : pnp_irq(pnp, 0));
1321 : }
1322 : }
1323 :
1324 : static void cmos_pnp_remove(struct pnp_dev *pnp)
1325 : {
1326 : cmos_do_remove(&pnp->dev);
1327 : }
1328 :
1329 : static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1330 : {
1331 : struct device *dev = &pnp->dev;
1332 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1333 :
1334 : if (system_state == SYSTEM_POWER_OFF) {
1335 : int retval = cmos_poweroff(dev);
1336 :
1337 : if (cmos_aie_poweroff(dev) < 0 && !retval)
1338 : return;
1339 : }
1340 :
1341 : cmos_do_shutdown(cmos->irq);
1342 : }
1343 :
1344 : static const struct pnp_device_id rtc_ids[] = {
1345 : { .id = "PNP0b00", },
1346 : { .id = "PNP0b01", },
1347 : { .id = "PNP0b02", },
1348 : { },
1349 : };
1350 : MODULE_DEVICE_TABLE(pnp, rtc_ids);
1351 :
1352 : static struct pnp_driver cmos_pnp_driver = {
1353 : .name = driver_name,
1354 : .id_table = rtc_ids,
1355 : .probe = cmos_pnp_probe,
1356 : .remove = cmos_pnp_remove,
1357 : .shutdown = cmos_pnp_shutdown,
1358 :
1359 : /* flag ensures resume() gets called, and stops syslog spam */
1360 : .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1361 : .driver = {
1362 : .pm = &cmos_pm_ops,
1363 : },
1364 : };
1365 :
1366 : #endif /* CONFIG_PNP */
1367 :
1368 : #ifdef CONFIG_OF
1369 : static const struct of_device_id of_cmos_match[] = {
1370 : {
1371 : .compatible = "motorola,mc146818",
1372 : },
1373 : { },
1374 : };
1375 : MODULE_DEVICE_TABLE(of, of_cmos_match);
1376 :
1377 : static __init void cmos_of_init(struct platform_device *pdev)
1378 : {
1379 : struct device_node *node = pdev->dev.of_node;
1380 : const __be32 *val;
1381 :
1382 : if (!node)
1383 : return;
1384 :
1385 : val = of_get_property(node, "ctrl-reg", NULL);
1386 : if (val)
1387 : CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1388 :
1389 : val = of_get_property(node, "freq-reg", NULL);
1390 : if (val)
1391 : CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1392 : }
1393 : #else
1394 1 : static inline void cmos_of_init(struct platform_device *pdev) {}
1395 : #endif
1396 : /*----------------------------------------------------------------*/
1397 :
1398 : /* Platform setup should have set up an RTC device, when PNP is
1399 : * unavailable ... this could happen even on (older) PCs.
1400 : */
1401 :
1402 1 : static int __init cmos_platform_probe(struct platform_device *pdev)
1403 : {
1404 1 : struct resource *resource;
1405 1 : int irq;
1406 :
1407 1 : cmos_of_init(pdev);
1408 1 : cmos_wake_setup(&pdev->dev);
1409 :
1410 1 : if (RTC_IOMAPPED)
1411 1 : resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1412 : else
1413 : resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1414 1 : irq = platform_get_irq(pdev, 0);
1415 1 : if (irq < 0)
1416 : irq = -1;
1417 :
1418 1 : return cmos_do_probe(&pdev->dev, resource, irq);
1419 : }
1420 :
1421 0 : static int cmos_platform_remove(struct platform_device *pdev)
1422 : {
1423 0 : cmos_do_remove(&pdev->dev);
1424 0 : return 0;
1425 : }
1426 :
1427 0 : static void cmos_platform_shutdown(struct platform_device *pdev)
1428 : {
1429 0 : struct device *dev = &pdev->dev;
1430 0 : struct cmos_rtc *cmos = dev_get_drvdata(dev);
1431 :
1432 0 : if (system_state == SYSTEM_POWER_OFF) {
1433 0 : int retval = cmos_poweroff(dev);
1434 :
1435 0 : if (cmos_aie_poweroff(dev) < 0 && !retval)
1436 : return;
1437 : }
1438 :
1439 0 : cmos_do_shutdown(cmos->irq);
1440 : }
1441 :
1442 : /* work with hotplug and coldplug */
1443 : MODULE_ALIAS("platform:rtc_cmos");
1444 :
1445 : static struct platform_driver cmos_platform_driver = {
1446 : .remove = cmos_platform_remove,
1447 : .shutdown = cmos_platform_shutdown,
1448 : .driver = {
1449 : .name = driver_name,
1450 : .pm = &cmos_pm_ops,
1451 : .of_match_table = of_match_ptr(of_cmos_match),
1452 : }
1453 : };
1454 :
1455 : #ifdef CONFIG_PNP
1456 : static bool pnp_driver_registered;
1457 : #endif
1458 : static bool platform_driver_registered;
1459 :
1460 1 : static int __init cmos_init(void)
1461 : {
1462 1 : int retval = 0;
1463 :
1464 : #ifdef CONFIG_PNP
1465 : retval = pnp_register_driver(&cmos_pnp_driver);
1466 : if (retval == 0)
1467 : pnp_driver_registered = true;
1468 : #endif
1469 :
1470 1 : if (!cmos_rtc.dev) {
1471 1 : retval = platform_driver_probe(&cmos_platform_driver,
1472 : cmos_platform_probe);
1473 1 : if (retval == 0)
1474 0 : platform_driver_registered = true;
1475 : }
1476 :
1477 1 : if (retval == 0)
1478 0 : return 0;
1479 :
1480 : #ifdef CONFIG_PNP
1481 : if (pnp_driver_registered)
1482 : pnp_unregister_driver(&cmos_pnp_driver);
1483 : #endif
1484 : return retval;
1485 : }
1486 : module_init(cmos_init);
1487 :
1488 0 : static void __exit cmos_exit(void)
1489 : {
1490 : #ifdef CONFIG_PNP
1491 : if (pnp_driver_registered)
1492 : pnp_unregister_driver(&cmos_pnp_driver);
1493 : #endif
1494 0 : if (platform_driver_registered)
1495 0 : platform_driver_unregister(&cmos_platform_driver);
1496 0 : }
1497 : module_exit(cmos_exit);
1498 :
1499 :
1500 : MODULE_AUTHOR("David Brownell");
1501 : MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1502 : MODULE_LICENSE("GPL");
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