Line data Source code
1 : /* SPDX-License-Identifier: GPL-2.0 */
2 : #ifndef _LINUX_PGTABLE_H
3 : #define _LINUX_PGTABLE_H
4 :
5 : #include <linux/pfn.h>
6 : #include <asm/pgtable.h>
7 :
8 : #ifndef __ASSEMBLY__
9 : #ifdef CONFIG_MMU
10 :
11 : #include <linux/mm_types.h>
12 : #include <linux/bug.h>
13 : #include <linux/errno.h>
14 : #include <asm-generic/pgtable_uffd.h>
15 :
16 : #if 5 - defined(__PAGETABLE_P4D_FOLDED) - defined(__PAGETABLE_PUD_FOLDED) - \
17 : defined(__PAGETABLE_PMD_FOLDED) != CONFIG_PGTABLE_LEVELS
18 : #error CONFIG_PGTABLE_LEVELS is not consistent with __PAGETABLE_{P4D,PUD,PMD}_FOLDED
19 : #endif
20 :
21 : /*
22 : * On almost all architectures and configurations, 0 can be used as the
23 : * upper ceiling to free_pgtables(): on many architectures it has the same
24 : * effect as using TASK_SIZE. However, there is one configuration which
25 : * must impose a more careful limit, to avoid freeing kernel pgtables.
26 : */
27 : #ifndef USER_PGTABLES_CEILING
28 : #define USER_PGTABLES_CEILING 0UL
29 : #endif
30 :
31 : /*
32 : * A page table page can be thought of an array like this: pXd_t[PTRS_PER_PxD]
33 : *
34 : * The pXx_index() functions return the index of the entry in the page
35 : * table page which would control the given virtual address
36 : *
37 : * As these functions may be used by the same code for different levels of
38 : * the page table folding, they are always available, regardless of
39 : * CONFIG_PGTABLE_LEVELS value. For the folded levels they simply return 0
40 : * because in such cases PTRS_PER_PxD equals 1.
41 : */
42 :
43 478748 : static inline unsigned long pte_index(unsigned long address)
44 : {
45 478551 : return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
46 : }
47 :
48 : #ifndef pmd_index
49 418832 : static inline unsigned long pmd_index(unsigned long address)
50 : {
51 418631 : return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
52 : }
53 : #define pmd_index pmd_index
54 : #endif
55 :
56 : #ifndef pud_index
57 417242 : static inline unsigned long pud_index(unsigned long address)
58 : {
59 416981 : return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
60 : }
61 : #define pud_index pud_index
62 : #endif
63 :
64 : #ifndef pgd_index
65 : /* Must be a compile-time constant, so implement it as a macro */
66 : #define pgd_index(a) (((a) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
67 : #endif
68 :
69 : #ifndef pte_offset_kernel
70 478604 : static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
71 : {
72 948107 : return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
73 : }
74 : #define pte_offset_kernel pte_offset_kernel
75 : #endif
76 :
77 : #if defined(CONFIG_HIGHPTE)
78 : #define pte_offset_map(dir, address) \
79 : ((pte_t *)kmap_atomic(pmd_page(*(dir))) + \
80 : pte_index((address)))
81 : #define pte_unmap(pte) kunmap_atomic((pte))
82 : #else
83 : #define pte_offset_map(dir, address) pte_offset_kernel((dir), (address))
84 : #define pte_unmap(pte) ((void)(pte)) /* NOP */
85 : #endif
86 :
87 : /* Find an entry in the second-level page table.. */
88 : #ifndef pmd_offset
89 417031 : static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
90 : {
91 827326 : return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
92 : }
93 : #define pmd_offset pmd_offset
94 : #endif
95 :
96 : #ifndef pud_offset
97 414673 : static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
98 : {
99 414477 : return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
100 : }
101 : #define pud_offset pud_offset
102 : #endif
103 :
104 383585 : static inline pgd_t *pgd_offset_pgd(pgd_t *pgd, unsigned long address)
105 : {
106 383585 : return (pgd + pgd_index(address));
107 : };
108 :
109 : /*
110 : * a shortcut to get a pgd_t in a given mm
111 : */
112 : #ifndef pgd_offset
113 : #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
114 : #endif
115 :
116 : /*
117 : * a shortcut which implies the use of the kernel's pgd, instead
118 : * of a process's
119 : */
120 : #ifndef pgd_offset_k
121 : #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
122 : #endif
123 :
124 : /*
125 : * In many cases it is known that a virtual address is mapped at PMD or PTE
126 : * level, so instead of traversing all the page table levels, we can get a
127 : * pointer to the PMD entry in user or kernel page table or translate a virtual
128 : * address to the pointer in the PTE in the kernel page tables with simple
129 : * helpers.
130 : */
131 : static inline pmd_t *pmd_off(struct mm_struct *mm, unsigned long va)
132 : {
133 : return pmd_offset(pud_offset(p4d_offset(pgd_offset(mm, va), va), va), va);
134 : }
135 :
136 : static inline pmd_t *pmd_off_k(unsigned long va)
137 : {
138 : return pmd_offset(pud_offset(p4d_offset(pgd_offset_k(va), va), va), va);
139 : }
140 :
141 : static inline pte_t *virt_to_kpte(unsigned long vaddr)
142 : {
143 : pmd_t *pmd = pmd_off_k(vaddr);
144 :
145 : return pmd_none(*pmd) ? NULL : pte_offset_kernel(pmd, vaddr);
146 : }
147 :
148 : #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
149 : extern int ptep_set_access_flags(struct vm_area_struct *vma,
150 : unsigned long address, pte_t *ptep,
151 : pte_t entry, int dirty);
152 : #endif
153 :
154 : #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
155 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
156 : extern int pmdp_set_access_flags(struct vm_area_struct *vma,
157 : unsigned long address, pmd_t *pmdp,
158 : pmd_t entry, int dirty);
159 : extern int pudp_set_access_flags(struct vm_area_struct *vma,
160 : unsigned long address, pud_t *pudp,
161 : pud_t entry, int dirty);
162 : #else
163 : static inline int pmdp_set_access_flags(struct vm_area_struct *vma,
164 : unsigned long address, pmd_t *pmdp,
165 : pmd_t entry, int dirty)
166 : {
167 : BUILD_BUG();
168 : return 0;
169 : }
170 : static inline int pudp_set_access_flags(struct vm_area_struct *vma,
171 : unsigned long address, pud_t *pudp,
172 : pud_t entry, int dirty)
173 : {
174 : BUILD_BUG();
175 : return 0;
176 : }
177 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
178 : #endif
179 :
180 : #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
181 : static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
182 : unsigned long address,
183 : pte_t *ptep)
184 : {
185 : pte_t pte = *ptep;
186 : int r = 1;
187 : if (!pte_young(pte))
188 : r = 0;
189 : else
190 : set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
191 : return r;
192 : }
193 : #endif
194 :
195 : #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
196 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
197 : static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
198 : unsigned long address,
199 : pmd_t *pmdp)
200 : {
201 : pmd_t pmd = *pmdp;
202 : int r = 1;
203 : if (!pmd_young(pmd))
204 : r = 0;
205 : else
206 : set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
207 : return r;
208 : }
209 : #else
210 : static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
211 : unsigned long address,
212 : pmd_t *pmdp)
213 : {
214 : BUILD_BUG();
215 : return 0;
216 : }
217 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
218 : #endif
219 :
220 : #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
221 : int ptep_clear_flush_young(struct vm_area_struct *vma,
222 : unsigned long address, pte_t *ptep);
223 : #endif
224 :
225 : #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
226 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
227 : extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
228 : unsigned long address, pmd_t *pmdp);
229 : #else
230 : /*
231 : * Despite relevant to THP only, this API is called from generic rmap code
232 : * under PageTransHuge(), hence needs a dummy implementation for !THP
233 : */
234 : static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
235 : unsigned long address, pmd_t *pmdp)
236 : {
237 : BUILD_BUG();
238 : return 0;
239 : }
240 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
241 : #endif
242 :
243 : #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
244 : static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
245 : unsigned long address,
246 : pte_t *ptep)
247 : {
248 : pte_t pte = *ptep;
249 : pte_clear(mm, address, ptep);
250 : return pte;
251 : }
252 : #endif
253 :
254 : #ifndef __HAVE_ARCH_PTEP_GET
255 2 : static inline pte_t ptep_get(pte_t *ptep)
256 : {
257 2 : return READ_ONCE(*ptep);
258 : }
259 : #endif
260 :
261 : #ifdef CONFIG_GUP_GET_PTE_LOW_HIGH
262 : /*
263 : * WARNING: only to be used in the get_user_pages_fast() implementation.
264 : *
265 : * With get_user_pages_fast(), we walk down the pagetables without taking any
266 : * locks. For this we would like to load the pointers atomically, but sometimes
267 : * that is not possible (e.g. without expensive cmpxchg8b on x86_32 PAE). What
268 : * we do have is the guarantee that a PTE will only either go from not present
269 : * to present, or present to not present or both -- it will not switch to a
270 : * completely different present page without a TLB flush in between; something
271 : * that we are blocking by holding interrupts off.
272 : *
273 : * Setting ptes from not present to present goes:
274 : *
275 : * ptep->pte_high = h;
276 : * smp_wmb();
277 : * ptep->pte_low = l;
278 : *
279 : * And present to not present goes:
280 : *
281 : * ptep->pte_low = 0;
282 : * smp_wmb();
283 : * ptep->pte_high = 0;
284 : *
285 : * We must ensure here that the load of pte_low sees 'l' IFF pte_high sees 'h'.
286 : * We load pte_high *after* loading pte_low, which ensures we don't see an older
287 : * value of pte_high. *Then* we recheck pte_low, which ensures that we haven't
288 : * picked up a changed pte high. We might have gotten rubbish values from
289 : * pte_low and pte_high, but we are guaranteed that pte_low will not have the
290 : * present bit set *unless* it is 'l'. Because get_user_pages_fast() only
291 : * operates on present ptes we're safe.
292 : */
293 : static inline pte_t ptep_get_lockless(pte_t *ptep)
294 : {
295 : pte_t pte;
296 :
297 : do {
298 : pte.pte_low = ptep->pte_low;
299 : smp_rmb();
300 : pte.pte_high = ptep->pte_high;
301 : smp_rmb();
302 : } while (unlikely(pte.pte_low != ptep->pte_low));
303 :
304 : return pte;
305 : }
306 : #else /* CONFIG_GUP_GET_PTE_LOW_HIGH */
307 : /*
308 : * We require that the PTE can be read atomically.
309 : */
310 2 : static inline pte_t ptep_get_lockless(pte_t *ptep)
311 : {
312 2 : return ptep_get(ptep);
313 : }
314 : #endif /* CONFIG_GUP_GET_PTE_LOW_HIGH */
315 :
316 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
317 : #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
318 : static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
319 : unsigned long address,
320 : pmd_t *pmdp)
321 : {
322 : pmd_t pmd = *pmdp;
323 : pmd_clear(pmdp);
324 : return pmd;
325 : }
326 : #endif /* __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR */
327 : #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
328 : static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
329 : unsigned long address,
330 : pud_t *pudp)
331 : {
332 : pud_t pud = *pudp;
333 :
334 : pud_clear(pudp);
335 : return pud;
336 : }
337 : #endif /* __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR */
338 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
339 :
340 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
341 : #ifndef __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
342 17 : static inline pmd_t pmdp_huge_get_and_clear_full(struct vm_area_struct *vma,
343 : unsigned long address, pmd_t *pmdp,
344 : int full)
345 : {
346 34 : return pmdp_huge_get_and_clear(vma->vm_mm, address, pmdp);
347 : }
348 : #endif
349 :
350 : #ifndef __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR_FULL
351 0 : static inline pud_t pudp_huge_get_and_clear_full(struct mm_struct *mm,
352 : unsigned long address, pud_t *pudp,
353 : int full)
354 : {
355 0 : return pudp_huge_get_and_clear(mm, address, pudp);
356 : }
357 : #endif
358 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
359 :
360 : #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
361 : static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
362 : unsigned long address, pte_t *ptep,
363 : int full)
364 : {
365 : pte_t pte;
366 : pte = ptep_get_and_clear(mm, address, ptep);
367 : return pte;
368 : }
369 : #endif
370 :
371 :
372 : /*
373 : * If two threads concurrently fault at the same page, the thread that
374 : * won the race updates the PTE and its local TLB/Cache. The other thread
375 : * gives up, simply does nothing, and continues; on architectures where
376 : * software can update TLB, local TLB can be updated here to avoid next page
377 : * fault. This function updates TLB only, do nothing with cache or others.
378 : * It is the difference with function update_mmu_cache.
379 : */
380 : #ifndef __HAVE_ARCH_UPDATE_MMU_TLB
381 10583 : static inline void update_mmu_tlb(struct vm_area_struct *vma,
382 : unsigned long address, pte_t *ptep)
383 : {
384 10583 : }
385 : #define __HAVE_ARCH_UPDATE_MMU_TLB
386 : #endif
387 :
388 : /*
389 : * Some architectures may be able to avoid expensive synchronization
390 : * primitives when modifications are made to PTE's which are already
391 : * not present, or in the process of an address space destruction.
392 : */
393 : #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
394 0 : static inline void pte_clear_not_present_full(struct mm_struct *mm,
395 : unsigned long address,
396 : pte_t *ptep,
397 : int full)
398 : {
399 0 : pte_clear(mm, address, ptep);
400 : }
401 : #endif
402 :
403 : #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
404 : extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
405 : unsigned long address,
406 : pte_t *ptep);
407 : #endif
408 :
409 : #ifndef __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
410 : extern pmd_t pmdp_huge_clear_flush(struct vm_area_struct *vma,
411 : unsigned long address,
412 : pmd_t *pmdp);
413 : extern pud_t pudp_huge_clear_flush(struct vm_area_struct *vma,
414 : unsigned long address,
415 : pud_t *pudp);
416 : #endif
417 :
418 : #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
419 : struct mm_struct;
420 : static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
421 : {
422 : pte_t old_pte = *ptep;
423 : set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
424 : }
425 : #endif
426 :
427 : /*
428 : * On some architectures hardware does not set page access bit when accessing
429 : * memory page, it is responsibilty of software setting this bit. It brings
430 : * out extra page fault penalty to track page access bit. For optimization page
431 : * access bit can be set during all page fault flow on these arches.
432 : * To be differentiate with macro pte_mkyoung, this macro is used on platforms
433 : * where software maintains page access bit.
434 : */
435 : #ifndef pte_savedwrite
436 : #define pte_savedwrite pte_write
437 : #endif
438 :
439 : #ifndef pte_mk_savedwrite
440 : #define pte_mk_savedwrite pte_mkwrite
441 : #endif
442 :
443 : #ifndef pte_clear_savedwrite
444 : #define pte_clear_savedwrite pte_wrprotect
445 : #endif
446 :
447 : #ifndef pmd_savedwrite
448 : #define pmd_savedwrite pmd_write
449 : #endif
450 :
451 : #ifndef pmd_mk_savedwrite
452 : #define pmd_mk_savedwrite pmd_mkwrite
453 : #endif
454 :
455 : #ifndef pmd_clear_savedwrite
456 : #define pmd_clear_savedwrite pmd_wrprotect
457 : #endif
458 :
459 : #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
460 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
461 : static inline void pmdp_set_wrprotect(struct mm_struct *mm,
462 : unsigned long address, pmd_t *pmdp)
463 : {
464 : pmd_t old_pmd = *pmdp;
465 : set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
466 : }
467 : #else
468 : static inline void pmdp_set_wrprotect(struct mm_struct *mm,
469 : unsigned long address, pmd_t *pmdp)
470 : {
471 : BUILD_BUG();
472 : }
473 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
474 : #endif
475 : #ifndef __HAVE_ARCH_PUDP_SET_WRPROTECT
476 : #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
477 0 : static inline void pudp_set_wrprotect(struct mm_struct *mm,
478 : unsigned long address, pud_t *pudp)
479 : {
480 0 : pud_t old_pud = *pudp;
481 :
482 0 : set_pud_at(mm, address, pudp, pud_wrprotect(old_pud));
483 : }
484 : #else
485 : static inline void pudp_set_wrprotect(struct mm_struct *mm,
486 : unsigned long address, pud_t *pudp)
487 : {
488 : BUILD_BUG();
489 : }
490 : #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */
491 : #endif
492 :
493 : #ifndef pmdp_collapse_flush
494 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
495 : extern pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
496 : unsigned long address, pmd_t *pmdp);
497 : #else
498 : static inline pmd_t pmdp_collapse_flush(struct vm_area_struct *vma,
499 : unsigned long address,
500 : pmd_t *pmdp)
501 : {
502 : BUILD_BUG();
503 : return *pmdp;
504 : }
505 : #define pmdp_collapse_flush pmdp_collapse_flush
506 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
507 : #endif
508 :
509 : #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
510 : extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
511 : pgtable_t pgtable);
512 : #endif
513 :
514 : #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
515 : extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
516 : #endif
517 :
518 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
519 : /*
520 : * This is an implementation of pmdp_establish() that is only suitable for an
521 : * architecture that doesn't have hardware dirty/accessed bits. In this case we
522 : * can't race with CPU which sets these bits and non-atomic aproach is fine.
523 : */
524 : static inline pmd_t generic_pmdp_establish(struct vm_area_struct *vma,
525 : unsigned long address, pmd_t *pmdp, pmd_t pmd)
526 : {
527 : pmd_t old_pmd = *pmdp;
528 : set_pmd_at(vma->vm_mm, address, pmdp, pmd);
529 : return old_pmd;
530 : }
531 : #endif
532 :
533 : #ifndef __HAVE_ARCH_PMDP_INVALIDATE
534 : extern pmd_t pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
535 : pmd_t *pmdp);
536 : #endif
537 :
538 : #ifndef __HAVE_ARCH_PTE_SAME
539 : static inline int pte_same(pte_t pte_a, pte_t pte_b)
540 : {
541 : return pte_val(pte_a) == pte_val(pte_b);
542 : }
543 : #endif
544 :
545 : #ifndef __HAVE_ARCH_PTE_UNUSED
546 : /*
547 : * Some architectures provide facilities to virtualization guests
548 : * so that they can flag allocated pages as unused. This allows the
549 : * host to transparently reclaim unused pages. This function returns
550 : * whether the pte's page is unused.
551 : */
552 0 : static inline int pte_unused(pte_t pte)
553 : {
554 0 : return 0;
555 : }
556 : #endif
557 :
558 : #ifndef pte_access_permitted
559 : #define pte_access_permitted(pte, write) \
560 : (pte_present(pte) && (!(write) || pte_write(pte)))
561 : #endif
562 :
563 : #ifndef pmd_access_permitted
564 : #define pmd_access_permitted(pmd, write) \
565 : (pmd_present(pmd) && (!(write) || pmd_write(pmd)))
566 : #endif
567 :
568 : #ifndef pud_access_permitted
569 : #define pud_access_permitted(pud, write) \
570 : (pud_present(pud) && (!(write) || pud_write(pud)))
571 : #endif
572 :
573 : #ifndef p4d_access_permitted
574 : #define p4d_access_permitted(p4d, write) \
575 : (p4d_present(p4d) && (!(write) || p4d_write(p4d)))
576 : #endif
577 :
578 : #ifndef pgd_access_permitted
579 : #define pgd_access_permitted(pgd, write) \
580 : (pgd_present(pgd) && (!(write) || pgd_write(pgd)))
581 : #endif
582 :
583 : #ifndef __HAVE_ARCH_PMD_SAME
584 3 : static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
585 : {
586 3 : return pmd_val(pmd_a) == pmd_val(pmd_b);
587 : }
588 :
589 0 : static inline int pud_same(pud_t pud_a, pud_t pud_b)
590 : {
591 0 : return pud_val(pud_a) == pud_val(pud_b);
592 : }
593 : #endif
594 :
595 : #ifndef __HAVE_ARCH_P4D_SAME
596 0 : static inline int p4d_same(p4d_t p4d_a, p4d_t p4d_b)
597 : {
598 0 : return p4d_val(p4d_a) == p4d_val(p4d_b);
599 : }
600 : #endif
601 :
602 : #ifndef __HAVE_ARCH_PGD_SAME
603 : static inline int pgd_same(pgd_t pgd_a, pgd_t pgd_b)
604 : {
605 : return pgd_val(pgd_a) == pgd_val(pgd_b);
606 : }
607 : #endif
608 :
609 : /*
610 : * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
611 : * TLB flush will be required as a result of the "set". For example, use
612 : * in scenarios where it is known ahead of time that the routine is
613 : * setting non-present entries, or re-setting an existing entry to the
614 : * same value. Otherwise, use the typical "set" helpers and flush the
615 : * TLB.
616 : */
617 : #define set_pte_safe(ptep, pte) \
618 : ({ \
619 : WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
620 : set_pte(ptep, pte); \
621 : })
622 :
623 : #define set_pmd_safe(pmdp, pmd) \
624 : ({ \
625 : WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
626 : set_pmd(pmdp, pmd); \
627 : })
628 :
629 : #define set_pud_safe(pudp, pud) \
630 : ({ \
631 : WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
632 : set_pud(pudp, pud); \
633 : })
634 :
635 : #define set_p4d_safe(p4dp, p4d) \
636 : ({ \
637 : WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
638 : set_p4d(p4dp, p4d); \
639 : })
640 :
641 : #define set_pgd_safe(pgdp, pgd) \
642 : ({ \
643 : WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
644 : set_pgd(pgdp, pgd); \
645 : })
646 :
647 : #ifndef __HAVE_ARCH_DO_SWAP_PAGE
648 : /*
649 : * Some architectures support metadata associated with a page. When a
650 : * page is being swapped out, this metadata must be saved so it can be
651 : * restored when the page is swapped back in. SPARC M7 and newer
652 : * processors support an ADI (Application Data Integrity) tag for the
653 : * page as metadata for the page. arch_do_swap_page() can restore this
654 : * metadata when a page is swapped back in.
655 : */
656 : static inline void arch_do_swap_page(struct mm_struct *mm,
657 : struct vm_area_struct *vma,
658 : unsigned long addr,
659 : pte_t pte, pte_t oldpte)
660 : {
661 :
662 : }
663 : #endif
664 :
665 : #ifndef __HAVE_ARCH_UNMAP_ONE
666 : /*
667 : * Some architectures support metadata associated with a page. When a
668 : * page is being swapped out, this metadata must be saved so it can be
669 : * restored when the page is swapped back in. SPARC M7 and newer
670 : * processors support an ADI (Application Data Integrity) tag for the
671 : * page as metadata for the page. arch_unmap_one() can save this
672 : * metadata on a swap-out of a page.
673 : */
674 0 : static inline int arch_unmap_one(struct mm_struct *mm,
675 : struct vm_area_struct *vma,
676 : unsigned long addr,
677 : pte_t orig_pte)
678 : {
679 0 : return 0;
680 : }
681 : #endif
682 :
683 : /*
684 : * Allow architectures to preserve additional metadata associated with
685 : * swapped-out pages. The corresponding __HAVE_ARCH_SWAP_* macros and function
686 : * prototypes must be defined in the arch-specific asm/pgtable.h file.
687 : */
688 : #ifndef __HAVE_ARCH_PREPARE_TO_SWAP
689 : static inline int arch_prepare_to_swap(struct page *page)
690 : {
691 : return 0;
692 : }
693 : #endif
694 :
695 : #ifndef __HAVE_ARCH_SWAP_INVALIDATE
696 : static inline void arch_swap_invalidate_page(int type, pgoff_t offset)
697 : {
698 : }
699 :
700 : static inline void arch_swap_invalidate_area(int type)
701 : {
702 : }
703 : #endif
704 :
705 : #ifndef __HAVE_ARCH_SWAP_RESTORE
706 : static inline void arch_swap_restore(swp_entry_t entry, struct page *page)
707 : {
708 : }
709 : #endif
710 :
711 : #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
712 : #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
713 : #endif
714 :
715 : #ifndef __HAVE_ARCH_MOVE_PTE
716 : #define move_pte(pte, prot, old_addr, new_addr) (pte)
717 : #endif
718 :
719 : #ifndef pte_accessible
720 : # define pte_accessible(mm, pte) ((void)(pte), 1)
721 : #endif
722 :
723 : #ifndef flush_tlb_fix_spurious_fault
724 : #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
725 : #endif
726 :
727 : /*
728 : * When walking page tables, get the address of the next boundary,
729 : * or the end address of the range if that comes earlier. Although no
730 : * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
731 : */
732 :
733 : #define pgd_addr_end(addr, end) \
734 : ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
735 : (__boundary - 1 < (end) - 1)? __boundary: (end); \
736 : })
737 :
738 : #ifndef p4d_addr_end
739 : #define p4d_addr_end(addr, end) \
740 : ({ unsigned long __boundary = ((addr) + P4D_SIZE) & P4D_MASK; \
741 : (__boundary - 1 < (end) - 1)? __boundary: (end); \
742 : })
743 : #endif
744 :
745 : #ifndef pud_addr_end
746 : #define pud_addr_end(addr, end) \
747 : ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
748 : (__boundary - 1 < (end) - 1)? __boundary: (end); \
749 : })
750 : #endif
751 :
752 : #ifndef pmd_addr_end
753 : #define pmd_addr_end(addr, end) \
754 : ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
755 : (__boundary - 1 < (end) - 1)? __boundary: (end); \
756 : })
757 : #endif
758 :
759 : /*
760 : * When walking page tables, we usually want to skip any p?d_none entries;
761 : * and any p?d_bad entries - reporting the error before resetting to none.
762 : * Do the tests inline, but report and clear the bad entry in mm/memory.c.
763 : */
764 : void pgd_clear_bad(pgd_t *);
765 :
766 : #ifndef __PAGETABLE_P4D_FOLDED
767 : void p4d_clear_bad(p4d_t *);
768 : #else
769 : #define p4d_clear_bad(p4d) do { } while (0)
770 : #endif
771 :
772 : #ifndef __PAGETABLE_PUD_FOLDED
773 : void pud_clear_bad(pud_t *);
774 : #else
775 : #define pud_clear_bad(p4d) do { } while (0)
776 : #endif
777 :
778 : void pmd_clear_bad(pmd_t *);
779 :
780 172632 : static inline int pgd_none_or_clear_bad(pgd_t *pgd)
781 : {
782 172632 : if (pgd_none(*pgd))
783 : return 1;
784 172632 : if (unlikely(pgd_bad(*pgd))) {
785 : pgd_clear_bad(pgd);
786 : return 1;
787 : }
788 172632 : return 0;
789 : }
790 :
791 172638 : static inline int p4d_none_or_clear_bad(p4d_t *p4d)
792 : {
793 172638 : if (p4d_none(*p4d))
794 : return 1;
795 171111 : if (unlikely(p4d_bad(*p4d))) {
796 : p4d_clear_bad(p4d);
797 : return 1;
798 : }
799 : return 0;
800 : }
801 :
802 171132 : static inline int pud_none_or_clear_bad(pud_t *pud)
803 : {
804 171132 : if (pud_none(*pud))
805 : return 1;
806 341259 : if (unlikely(pud_bad(*pud))) {
807 0 : pud_clear_bad(pud);
808 0 : return 1;
809 : }
810 : return 0;
811 : }
812 :
813 57084 : static inline int pmd_none_or_clear_bad(pmd_t *pmd)
814 : {
815 57084 : if (pmd_none(*pmd))
816 : return 1;
817 111582 : if (unlikely(pmd_bad(*pmd))) {
818 0 : pmd_clear_bad(pmd);
819 0 : return 1;
820 : }
821 : return 0;
822 : }
823 :
824 14563 : static inline pte_t __ptep_modify_prot_start(struct vm_area_struct *vma,
825 : unsigned long addr,
826 : pte_t *ptep)
827 : {
828 : /*
829 : * Get the current pte state, but zero it out to make it
830 : * non-present, preventing the hardware from asynchronously
831 : * updating it.
832 : */
833 29126 : return ptep_get_and_clear(vma->vm_mm, addr, ptep);
834 : }
835 :
836 14563 : static inline void __ptep_modify_prot_commit(struct vm_area_struct *vma,
837 : unsigned long addr,
838 : pte_t *ptep, pte_t pte)
839 : {
840 : /*
841 : * The pte is non-present, so there's no hardware state to
842 : * preserve.
843 : */
844 14563 : set_pte_at(vma->vm_mm, addr, ptep, pte);
845 : }
846 :
847 : #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
848 : /*
849 : * Start a pte protection read-modify-write transaction, which
850 : * protects against asynchronous hardware modifications to the pte.
851 : * The intention is not to prevent the hardware from making pte
852 : * updates, but to prevent any updates it may make from being lost.
853 : *
854 : * This does not protect against other software modifications of the
855 : * pte; the appropriate pte lock must be held over the transation.
856 : *
857 : * Note that this interface is intended to be batchable, meaning that
858 : * ptep_modify_prot_commit may not actually update the pte, but merely
859 : * queue the update to be done at some later time. The update must be
860 : * actually committed before the pte lock is released, however.
861 : */
862 14563 : static inline pte_t ptep_modify_prot_start(struct vm_area_struct *vma,
863 : unsigned long addr,
864 : pte_t *ptep)
865 : {
866 29126 : return __ptep_modify_prot_start(vma, addr, ptep);
867 : }
868 :
869 : /*
870 : * Commit an update to a pte, leaving any hardware-controlled bits in
871 : * the PTE unmodified.
872 : */
873 14563 : static inline void ptep_modify_prot_commit(struct vm_area_struct *vma,
874 : unsigned long addr,
875 : pte_t *ptep, pte_t old_pte, pte_t pte)
876 : {
877 14563 : __ptep_modify_prot_commit(vma, addr, ptep, pte);
878 : }
879 : #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
880 : #endif /* CONFIG_MMU */
881 :
882 : /*
883 : * No-op macros that just return the current protection value. Defined here
884 : * because these macros can be used even if CONFIG_MMU is not defined.
885 : */
886 :
887 : #ifndef pgprot_nx
888 : #define pgprot_nx(prot) (prot)
889 : #endif
890 :
891 : #ifndef pgprot_noncached
892 : #define pgprot_noncached(prot) (prot)
893 : #endif
894 :
895 : #ifndef pgprot_writecombine
896 : #define pgprot_writecombine pgprot_noncached
897 : #endif
898 :
899 : #ifndef pgprot_writethrough
900 : #define pgprot_writethrough pgprot_noncached
901 : #endif
902 :
903 : #ifndef pgprot_device
904 : #define pgprot_device pgprot_noncached
905 : #endif
906 :
907 : #ifndef pgprot_mhp
908 : #define pgprot_mhp(prot) (prot)
909 : #endif
910 :
911 : #ifdef CONFIG_MMU
912 : #ifndef pgprot_modify
913 : #define pgprot_modify pgprot_modify
914 : static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
915 : {
916 : if (pgprot_val(oldprot) == pgprot_val(pgprot_noncached(oldprot)))
917 : newprot = pgprot_noncached(newprot);
918 : if (pgprot_val(oldprot) == pgprot_val(pgprot_writecombine(oldprot)))
919 : newprot = pgprot_writecombine(newprot);
920 : if (pgprot_val(oldprot) == pgprot_val(pgprot_device(oldprot)))
921 : newprot = pgprot_device(newprot);
922 : return newprot;
923 : }
924 : #endif
925 : #endif /* CONFIG_MMU */
926 :
927 : #ifndef pgprot_encrypted
928 : #define pgprot_encrypted(prot) (prot)
929 : #endif
930 :
931 : #ifndef pgprot_decrypted
932 : #define pgprot_decrypted(prot) (prot)
933 : #endif
934 :
935 : /*
936 : * A facility to provide lazy MMU batching. This allows PTE updates and
937 : * page invalidations to be delayed until a call to leave lazy MMU mode
938 : * is issued. Some architectures may benefit from doing this, and it is
939 : * beneficial for both shadow and direct mode hypervisors, which may batch
940 : * the PTE updates which happen during this window. Note that using this
941 : * interface requires that read hazards be removed from the code. A read
942 : * hazard could result in the direct mode hypervisor case, since the actual
943 : * write to the page tables may not yet have taken place, so reads though
944 : * a raw PTE pointer after it has been modified are not guaranteed to be
945 : * up to date. This mode can only be entered and left under the protection of
946 : * the page table locks for all page tables which may be modified. In the UP
947 : * case, this is required so that preemption is disabled, and in the SMP case,
948 : * it must synchronize the delayed page table writes properly on other CPUs.
949 : */
950 : #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
951 : #define arch_enter_lazy_mmu_mode() do {} while (0)
952 : #define arch_leave_lazy_mmu_mode() do {} while (0)
953 : #define arch_flush_lazy_mmu_mode() do {} while (0)
954 : #endif
955 :
956 : /*
957 : * A facility to provide batching of the reload of page tables and
958 : * other process state with the actual context switch code for
959 : * paravirtualized guests. By convention, only one of the batched
960 : * update (lazy) modes (CPU, MMU) should be active at any given time,
961 : * entry should never be nested, and entry and exits should always be
962 : * paired. This is for sanity of maintaining and reasoning about the
963 : * kernel code. In this case, the exit (end of the context switch) is
964 : * in architecture-specific code, and so doesn't need a generic
965 : * definition.
966 : */
967 : #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
968 : #define arch_start_context_switch(prev) do {} while (0)
969 : #endif
970 :
971 : #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
972 : #ifndef CONFIG_ARCH_ENABLE_THP_MIGRATION
973 : static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
974 : {
975 : return pmd;
976 : }
977 :
978 : static inline int pmd_swp_soft_dirty(pmd_t pmd)
979 : {
980 : return 0;
981 : }
982 :
983 : static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
984 : {
985 : return pmd;
986 : }
987 : #endif
988 : #else /* !CONFIG_HAVE_ARCH_SOFT_DIRTY */
989 : static inline int pte_soft_dirty(pte_t pte)
990 : {
991 : return 0;
992 : }
993 :
994 : static inline int pmd_soft_dirty(pmd_t pmd)
995 : {
996 : return 0;
997 : }
998 :
999 : static inline pte_t pte_mksoft_dirty(pte_t pte)
1000 : {
1001 : return pte;
1002 : }
1003 :
1004 : static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
1005 : {
1006 : return pmd;
1007 : }
1008 :
1009 : static inline pte_t pte_clear_soft_dirty(pte_t pte)
1010 : {
1011 : return pte;
1012 : }
1013 :
1014 : static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
1015 : {
1016 : return pmd;
1017 : }
1018 :
1019 : static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1020 : {
1021 : return pte;
1022 : }
1023 :
1024 : static inline int pte_swp_soft_dirty(pte_t pte)
1025 : {
1026 : return 0;
1027 : }
1028 :
1029 : static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1030 : {
1031 : return pte;
1032 : }
1033 :
1034 : static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1035 : {
1036 : return pmd;
1037 : }
1038 :
1039 : static inline int pmd_swp_soft_dirty(pmd_t pmd)
1040 : {
1041 : return 0;
1042 : }
1043 :
1044 : static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1045 : {
1046 : return pmd;
1047 : }
1048 : #endif
1049 :
1050 : #ifndef __HAVE_PFNMAP_TRACKING
1051 : /*
1052 : * Interfaces that can be used by architecture code to keep track of
1053 : * memory type of pfn mappings specified by the remap_pfn_range,
1054 : * vmf_insert_pfn.
1055 : */
1056 :
1057 : /*
1058 : * track_pfn_remap is called when a _new_ pfn mapping is being established
1059 : * by remap_pfn_range() for physical range indicated by pfn and size.
1060 : */
1061 : static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1062 : unsigned long pfn, unsigned long addr,
1063 : unsigned long size)
1064 : {
1065 : return 0;
1066 : }
1067 :
1068 : /*
1069 : * track_pfn_insert is called when a _new_ single pfn is established
1070 : * by vmf_insert_pfn().
1071 : */
1072 : static inline void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1073 : pfn_t pfn)
1074 : {
1075 : }
1076 :
1077 : /*
1078 : * track_pfn_copy is called when vma that is covering the pfnmap gets
1079 : * copied through copy_page_range().
1080 : */
1081 : static inline int track_pfn_copy(struct vm_area_struct *vma)
1082 : {
1083 : return 0;
1084 : }
1085 :
1086 : /*
1087 : * untrack_pfn is called while unmapping a pfnmap for a region.
1088 : * untrack can be called for a specific region indicated by pfn and size or
1089 : * can be for the entire vma (in which case pfn, size are zero).
1090 : */
1091 : static inline void untrack_pfn(struct vm_area_struct *vma,
1092 : unsigned long pfn, unsigned long size)
1093 : {
1094 : }
1095 :
1096 : /*
1097 : * untrack_pfn_moved is called while mremapping a pfnmap for a new region.
1098 : */
1099 : static inline void untrack_pfn_moved(struct vm_area_struct *vma)
1100 : {
1101 : }
1102 : #else
1103 : extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
1104 : unsigned long pfn, unsigned long addr,
1105 : unsigned long size);
1106 : extern void track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
1107 : pfn_t pfn);
1108 : extern int track_pfn_copy(struct vm_area_struct *vma);
1109 : extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
1110 : unsigned long size);
1111 : extern void untrack_pfn_moved(struct vm_area_struct *vma);
1112 : #endif
1113 :
1114 : #ifdef __HAVE_COLOR_ZERO_PAGE
1115 : static inline int is_zero_pfn(unsigned long pfn)
1116 : {
1117 : extern unsigned long zero_pfn;
1118 : unsigned long offset_from_zero_pfn = pfn - zero_pfn;
1119 : return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
1120 : }
1121 :
1122 : #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr))
1123 :
1124 : #else
1125 45771 : static inline int is_zero_pfn(unsigned long pfn)
1126 : {
1127 45771 : extern unsigned long zero_pfn;
1128 45771 : return pfn == zero_pfn;
1129 : }
1130 :
1131 14675 : static inline unsigned long my_zero_pfn(unsigned long addr)
1132 : {
1133 14675 : extern unsigned long zero_pfn;
1134 14675 : return zero_pfn;
1135 : }
1136 : #endif
1137 :
1138 : #ifdef CONFIG_MMU
1139 :
1140 : #ifndef CONFIG_TRANSPARENT_HUGEPAGE
1141 : static inline int pmd_trans_huge(pmd_t pmd)
1142 : {
1143 : return 0;
1144 : }
1145 : #ifndef pmd_write
1146 : static inline int pmd_write(pmd_t pmd)
1147 : {
1148 : BUG();
1149 : return 0;
1150 : }
1151 : #endif /* pmd_write */
1152 : #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1153 :
1154 : #ifndef pud_write
1155 : static inline int pud_write(pud_t pud)
1156 : {
1157 : BUG();
1158 : return 0;
1159 : }
1160 : #endif /* pud_write */
1161 :
1162 : #if !defined(CONFIG_ARCH_HAS_PTE_DEVMAP) || !defined(CONFIG_TRANSPARENT_HUGEPAGE)
1163 : static inline int pmd_devmap(pmd_t pmd)
1164 : {
1165 : return 0;
1166 : }
1167 : static inline int pud_devmap(pud_t pud)
1168 : {
1169 : return 0;
1170 : }
1171 : static inline int pgd_devmap(pgd_t pgd)
1172 : {
1173 : return 0;
1174 : }
1175 : #endif
1176 :
1177 : #if !defined(CONFIG_TRANSPARENT_HUGEPAGE) || \
1178 : (defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1179 : !defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD))
1180 : static inline int pud_trans_huge(pud_t pud)
1181 : {
1182 : return 0;
1183 : }
1184 : #endif
1185 :
1186 : /* See pmd_none_or_trans_huge_or_clear_bad for discussion. */
1187 171939 : static inline int pud_none_or_trans_huge_or_dev_or_clear_bad(pud_t *pud)
1188 : {
1189 171939 : pud_t pudval = READ_ONCE(*pud);
1190 :
1191 171939 : if (pud_none(pudval) || pud_trans_huge(pudval) || pud_devmap(pudval))
1192 : return 1;
1193 343878 : if (unlikely(pud_bad(pudval))) {
1194 0 : pud_clear_bad(pud);
1195 0 : return 1;
1196 : }
1197 : return 0;
1198 : }
1199 :
1200 : /* See pmd_trans_unstable for discussion. */
1201 171939 : static inline int pud_trans_unstable(pud_t *pud)
1202 : {
1203 : #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
1204 : defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
1205 171939 : return pud_none_or_trans_huge_or_dev_or_clear_bad(pud);
1206 : #else
1207 : return 0;
1208 : #endif
1209 : }
1210 :
1211 : #ifndef pmd_read_atomic
1212 354936 : static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
1213 : {
1214 : /*
1215 : * Depend on compiler for an atomic pmd read. NOTE: this is
1216 : * only going to work, if the pmdval_t isn't larger than
1217 : * an unsigned long.
1218 : */
1219 346973 : return *pmdp;
1220 : }
1221 : #endif
1222 :
1223 : #ifndef arch_needs_pgtable_deposit
1224 : #define arch_needs_pgtable_deposit() (false)
1225 : #endif
1226 : /*
1227 : * This function is meant to be used by sites walking pagetables with
1228 : * the mmap_lock held in read mode to protect against MADV_DONTNEED and
1229 : * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
1230 : * into a null pmd and the transhuge page fault can convert a null pmd
1231 : * into an hugepmd or into a regular pmd (if the hugepage allocation
1232 : * fails). While holding the mmap_lock in read mode the pmd becomes
1233 : * stable and stops changing under us only if it's not null and not a
1234 : * transhuge pmd. When those races occurs and this function makes a
1235 : * difference vs the standard pmd_none_or_clear_bad, the result is
1236 : * undefined so behaving like if the pmd was none is safe (because it
1237 : * can return none anyway). The compiler level barrier() is critically
1238 : * important to compute the two checks atomically on the same pmdval.
1239 : *
1240 : * For 32bit kernels with a 64bit large pmd_t this automatically takes
1241 : * care of reading the pmd atomically to avoid SMP race conditions
1242 : * against pmd_populate() when the mmap_lock is hold for reading by the
1243 : * caller (a special atomic read not done by "gcc" as in the generic
1244 : * version above, is also needed when THP is disabled because the page
1245 : * fault can populate the pmd from under us).
1246 : */
1247 345643 : static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
1248 : {
1249 345643 : pmd_t pmdval = pmd_read_atomic(pmd);
1250 : /*
1251 : * The barrier will stabilize the pmdval in a register or on
1252 : * the stack so that it will stop changing under the code.
1253 : *
1254 : * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
1255 : * pmd_read_atomic is allowed to return a not atomic pmdval
1256 : * (for example pointing to an hugepage that has never been
1257 : * mapped in the pmd). The below checks will only care about
1258 : * the low part of the pmd with 32bit PAE x86 anyway, with the
1259 : * exception of pmd_none(). So the important thing is that if
1260 : * the low part of the pmd is found null, the high part will
1261 : * be also null or the pmd_none() check below would be
1262 : * confused.
1263 : */
1264 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1265 345643 : barrier();
1266 : #endif
1267 : /*
1268 : * !pmd_present() checks for pmd migration entries
1269 : *
1270 : * The complete check uses is_pmd_migration_entry() in linux/swapops.h
1271 : * But using that requires moving current function and pmd_trans_unstable()
1272 : * to linux/swapops.h to resovle dependency, which is too much code move.
1273 : *
1274 : * !pmd_present() is equivalent to is_pmd_migration_entry() currently,
1275 : * because !pmd_present() pages can only be under migration not swapped
1276 : * out.
1277 : *
1278 : * pmd_none() is preseved for future condition checks on pmd migration
1279 : * entries and not confusing with this function name, although it is
1280 : * redundant with !pmd_present().
1281 : */
1282 345649 : if (pmd_none(pmdval) || pmd_trans_huge(pmdval) ||
1283 342807 : (IS_ENABLED(CONFIG_ARCH_ENABLE_THP_MIGRATION) && !pmd_present(pmdval)))
1284 : return 1;
1285 342807 : if (unlikely(pmd_bad(pmdval))) {
1286 0 : pmd_clear_bad(pmd);
1287 0 : return 1;
1288 : }
1289 : return 0;
1290 : }
1291 :
1292 : /*
1293 : * This is a noop if Transparent Hugepage Support is not built into
1294 : * the kernel. Otherwise it is equivalent to
1295 : * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
1296 : * places that already verified the pmd is not none and they want to
1297 : * walk ptes while holding the mmap sem in read mode (write mode don't
1298 : * need this). If THP is not enabled, the pmd can't go away under the
1299 : * code even if MADV_DONTNEED runs, but if THP is enabled we need to
1300 : * run a pmd_trans_unstable before walking the ptes after
1301 : * split_huge_pmd returns (because it may have run when the pmd become
1302 : * null, but then a page fault can map in a THP and not a regular page).
1303 : */
1304 225530 : static inline int pmd_trans_unstable(pmd_t *pmd)
1305 : {
1306 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1307 225530 : return pmd_none_or_trans_huge_or_clear_bad(pmd);
1308 : #else
1309 : return 0;
1310 : #endif
1311 : }
1312 :
1313 : /*
1314 : * the ordering of these checks is important for pmds with _page_devmap set.
1315 : * if we check pmd_trans_unstable() first we will trip the bad_pmd() check
1316 : * inside of pmd_none_or_trans_huge_or_clear_bad(). this will end up correctly
1317 : * returning 1 but not before it spams dmesg with the pmd_clear_bad() output.
1318 : */
1319 173862 : static inline int pmd_devmap_trans_unstable(pmd_t *pmd)
1320 : {
1321 347728 : return pmd_devmap(*pmd) || pmd_trans_unstable(pmd);
1322 : }
1323 :
1324 : #ifndef CONFIG_NUMA_BALANCING
1325 : /*
1326 : * Technically a PTE can be PROTNONE even when not doing NUMA balancing but
1327 : * the only case the kernel cares is for NUMA balancing and is only ever set
1328 : * when the VMA is accessible. For PROT_NONE VMAs, the PTEs are not marked
1329 : * _PAGE_PROTNONE so by default, implement the helper as "always no". It
1330 : * is the responsibility of the caller to distinguish between PROT_NONE
1331 : * protections and NUMA hinting fault protections.
1332 : */
1333 47741 : static inline int pte_protnone(pte_t pte)
1334 : {
1335 47741 : return 0;
1336 : }
1337 :
1338 0 : static inline int pmd_protnone(pmd_t pmd)
1339 : {
1340 0 : return 0;
1341 : }
1342 : #endif /* CONFIG_NUMA_BALANCING */
1343 :
1344 : #endif /* CONFIG_MMU */
1345 :
1346 : #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
1347 :
1348 : #ifndef __PAGETABLE_P4D_FOLDED
1349 : int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot);
1350 : int p4d_clear_huge(p4d_t *p4d);
1351 : #else
1352 0 : static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1353 : {
1354 0 : return 0;
1355 : }
1356 10585 : static inline int p4d_clear_huge(p4d_t *p4d)
1357 : {
1358 10585 : return 0;
1359 : }
1360 : #endif /* !__PAGETABLE_P4D_FOLDED */
1361 :
1362 : int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot);
1363 : int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot);
1364 : int pud_clear_huge(pud_t *pud);
1365 : int pmd_clear_huge(pmd_t *pmd);
1366 : int p4d_free_pud_page(p4d_t *p4d, unsigned long addr);
1367 : int pud_free_pmd_page(pud_t *pud, unsigned long addr);
1368 : int pmd_free_pte_page(pmd_t *pmd, unsigned long addr);
1369 : #else /* !CONFIG_HAVE_ARCH_HUGE_VMAP */
1370 : static inline int p4d_set_huge(p4d_t *p4d, phys_addr_t addr, pgprot_t prot)
1371 : {
1372 : return 0;
1373 : }
1374 : static inline int pud_set_huge(pud_t *pud, phys_addr_t addr, pgprot_t prot)
1375 : {
1376 : return 0;
1377 : }
1378 : static inline int pmd_set_huge(pmd_t *pmd, phys_addr_t addr, pgprot_t prot)
1379 : {
1380 : return 0;
1381 : }
1382 : static inline int p4d_clear_huge(p4d_t *p4d)
1383 : {
1384 : return 0;
1385 : }
1386 : static inline int pud_clear_huge(pud_t *pud)
1387 : {
1388 : return 0;
1389 : }
1390 : static inline int pmd_clear_huge(pmd_t *pmd)
1391 : {
1392 : return 0;
1393 : }
1394 : static inline int p4d_free_pud_page(p4d_t *p4d, unsigned long addr)
1395 : {
1396 : return 0;
1397 : }
1398 : static inline int pud_free_pmd_page(pud_t *pud, unsigned long addr)
1399 : {
1400 : return 0;
1401 : }
1402 : static inline int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
1403 : {
1404 : return 0;
1405 : }
1406 : #endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
1407 :
1408 : #ifndef __HAVE_ARCH_FLUSH_PMD_TLB_RANGE
1409 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1410 : /*
1411 : * ARCHes with special requirements for evicting THP backing TLB entries can
1412 : * implement this. Otherwise also, it can help optimize normal TLB flush in
1413 : * THP regime. Stock flush_tlb_range() typically has optimization to nuke the
1414 : * entire TLB if flush span is greater than a threshold, which will
1415 : * likely be true for a single huge page. Thus a single THP flush will
1416 : * invalidate the entire TLB which is not desirable.
1417 : * e.g. see arch/arc: flush_pmd_tlb_range
1418 : */
1419 : #define flush_pmd_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1420 : #define flush_pud_tlb_range(vma, addr, end) flush_tlb_range(vma, addr, end)
1421 : #else
1422 : #define flush_pmd_tlb_range(vma, addr, end) BUILD_BUG()
1423 : #define flush_pud_tlb_range(vma, addr, end) BUILD_BUG()
1424 : #endif
1425 : #endif
1426 :
1427 : struct file;
1428 : int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
1429 : unsigned long size, pgprot_t *vma_prot);
1430 :
1431 : #ifndef CONFIG_X86_ESPFIX64
1432 1 : static inline void init_espfix_bsp(void) { }
1433 : #endif
1434 :
1435 : extern void __init pgtable_cache_init(void);
1436 :
1437 : #ifndef __HAVE_ARCH_PFN_MODIFY_ALLOWED
1438 : static inline bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot)
1439 : {
1440 : return true;
1441 : }
1442 :
1443 : static inline bool arch_has_pfn_modify_check(void)
1444 : {
1445 : return false;
1446 : }
1447 : #endif /* !_HAVE_ARCH_PFN_MODIFY_ALLOWED */
1448 :
1449 : /*
1450 : * Architecture PAGE_KERNEL_* fallbacks
1451 : *
1452 : * Some architectures don't define certain PAGE_KERNEL_* flags. This is either
1453 : * because they really don't support them, or the port needs to be updated to
1454 : * reflect the required functionality. Below are a set of relatively safe
1455 : * fallbacks, as best effort, which we can count on in lieu of the architectures
1456 : * not defining them on their own yet.
1457 : */
1458 :
1459 : #ifndef PAGE_KERNEL_RO
1460 : # define PAGE_KERNEL_RO PAGE_KERNEL
1461 : #endif
1462 :
1463 : #ifndef PAGE_KERNEL_EXEC
1464 : # define PAGE_KERNEL_EXEC PAGE_KERNEL
1465 : #endif
1466 :
1467 : /*
1468 : * Page Table Modification bits for pgtbl_mod_mask.
1469 : *
1470 : * These are used by the p?d_alloc_track*() set of functions an in the generic
1471 : * vmalloc/ioremap code to track at which page-table levels entries have been
1472 : * modified. Based on that the code can better decide when vmalloc and ioremap
1473 : * mapping changes need to be synchronized to other page-tables in the system.
1474 : */
1475 : #define __PGTBL_PGD_MODIFIED 0
1476 : #define __PGTBL_P4D_MODIFIED 1
1477 : #define __PGTBL_PUD_MODIFIED 2
1478 : #define __PGTBL_PMD_MODIFIED 3
1479 : #define __PGTBL_PTE_MODIFIED 4
1480 :
1481 : #define PGTBL_PGD_MODIFIED BIT(__PGTBL_PGD_MODIFIED)
1482 : #define PGTBL_P4D_MODIFIED BIT(__PGTBL_P4D_MODIFIED)
1483 : #define PGTBL_PUD_MODIFIED BIT(__PGTBL_PUD_MODIFIED)
1484 : #define PGTBL_PMD_MODIFIED BIT(__PGTBL_PMD_MODIFIED)
1485 : #define PGTBL_PTE_MODIFIED BIT(__PGTBL_PTE_MODIFIED)
1486 :
1487 : /* Page-Table Modification Mask */
1488 : typedef unsigned int pgtbl_mod_mask;
1489 :
1490 : #endif /* !__ASSEMBLY__ */
1491 :
1492 : #if !defined(MAX_POSSIBLE_PHYSMEM_BITS) && !defined(CONFIG_64BIT)
1493 : #ifdef CONFIG_PHYS_ADDR_T_64BIT
1494 : /*
1495 : * ZSMALLOC needs to know the highest PFN on 32-bit architectures
1496 : * with physical address space extension, but falls back to
1497 : * BITS_PER_LONG otherwise.
1498 : */
1499 : #error Missing MAX_POSSIBLE_PHYSMEM_BITS definition
1500 : #else
1501 : #define MAX_POSSIBLE_PHYSMEM_BITS 32
1502 : #endif
1503 : #endif
1504 :
1505 : #ifndef has_transparent_hugepage
1506 : #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1507 : #define has_transparent_hugepage() 1
1508 : #else
1509 : #define has_transparent_hugepage() 0
1510 : #endif
1511 : #endif
1512 :
1513 : /*
1514 : * On some architectures it depends on the mm if the p4d/pud or pmd
1515 : * layer of the page table hierarchy is folded or not.
1516 : */
1517 : #ifndef mm_p4d_folded
1518 : #define mm_p4d_folded(mm) __is_defined(__PAGETABLE_P4D_FOLDED)
1519 : #endif
1520 :
1521 : #ifndef mm_pud_folded
1522 : #define mm_pud_folded(mm) __is_defined(__PAGETABLE_PUD_FOLDED)
1523 : #endif
1524 :
1525 : #ifndef mm_pmd_folded
1526 : #define mm_pmd_folded(mm) __is_defined(__PAGETABLE_PMD_FOLDED)
1527 : #endif
1528 :
1529 : #ifndef p4d_offset_lockless
1530 : #define p4d_offset_lockless(pgdp, pgd, address) p4d_offset(&(pgd), address)
1531 : #endif
1532 : #ifndef pud_offset_lockless
1533 : #define pud_offset_lockless(p4dp, p4d, address) pud_offset(&(p4d), address)
1534 : #endif
1535 : #ifndef pmd_offset_lockless
1536 : #define pmd_offset_lockless(pudp, pud, address) pmd_offset(&(pud), address)
1537 : #endif
1538 :
1539 : /*
1540 : * p?d_leaf() - true if this entry is a final mapping to a physical address.
1541 : * This differs from p?d_huge() by the fact that they are always available (if
1542 : * the architecture supports large pages at the appropriate level) even
1543 : * if CONFIG_HUGETLB_PAGE is not defined.
1544 : * Only meaningful when called on a valid entry.
1545 : */
1546 : #ifndef pgd_leaf
1547 : #define pgd_leaf(x) 0
1548 : #endif
1549 : #ifndef p4d_leaf
1550 : #define p4d_leaf(x) 0
1551 : #endif
1552 : #ifndef pud_leaf
1553 : #define pud_leaf(x) 0
1554 : #endif
1555 : #ifndef pmd_leaf
1556 : #define pmd_leaf(x) 0
1557 : #endif
1558 :
1559 : #ifndef pgd_leaf_size
1560 : #define pgd_leaf_size(x) (1ULL << PGDIR_SHIFT)
1561 : #endif
1562 : #ifndef p4d_leaf_size
1563 : #define p4d_leaf_size(x) P4D_SIZE
1564 : #endif
1565 : #ifndef pud_leaf_size
1566 : #define pud_leaf_size(x) PUD_SIZE
1567 : #endif
1568 : #ifndef pmd_leaf_size
1569 : #define pmd_leaf_size(x) PMD_SIZE
1570 : #endif
1571 : #ifndef pte_leaf_size
1572 : #define pte_leaf_size(x) PAGE_SIZE
1573 : #endif
1574 :
1575 : #endif /* _LINUX_PGTABLE_H */
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